Texas Instruments CD74HCT85M, CD74HCT85E, CD74HC85PWR, CD74HC85M96, CD74HC85M Datasheet

Data sheet acquired from Harris Semiconductor SCHS136

CD74HC85,

CD74HCT85

August 1997

High Speed CMOS Logic

4-Bit Magnitude Comparator

	Features				Description
	•	Buffered Inputs and Outputs			The CD74HC85 and CD74HCT85 are high speed
[ /Title	•	Typical Propagation Delay: 13ns (Data to Output at			magnitude comparators that use silicon-gate CMOS
					technology to achieve operating speeds similar to LSTTL
(CD74		VCC = 5V, CL = 15pF, TA = 25oC			with the low power consumption of standard CMOS
HC85,	•	Serial or Parallel Expansion Without External Gating			integrated circuits.
CD74	•	Fanout (Over Temperature Range)			These 4-bit devices compare two binary, BCD, or other
HCT85		- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads			monotonic codes and present the three possible magnitude
)		- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads			results at the outputs (A > B, A < B, and A = B). The 4-bit
					input words are weighted (A0 to A3 and B0 to B3), where A3
/Sub-		o	o
	•			C	and B3 are the most significant bits.
ject		Wide Operating Temperature Range . . . -55 C to 125
	• Balanced Propagation Delay and Transition Times				The devices are expandable without external gating, in both
(High
	•	Significant Power Reduction Compared to LSTTL			serial and parallel fashion. The upper part of the truth table
Speed					indicates operation		using a single	device or devices in a
		Logic ICs
CMOS					serially expanded application. The parallel expansion
	• HC Types
Logic					scheme is described by the last three entries in the truth
		- 2V to 6V Operation			table.
4-Bit
		- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at			Ordering Information
Magni-
		VCC = 5V
tude										PKG.
	• HCT Types					TEMP. RANGE (oC)
Com-					PART NUMBER				PACKAGE	NO.
para-		- 4.5V to 5.5V Operation
					CD74HC85E		-55 to 125		16 Ld PDIP	E16.3
		- Direct LSTTL Input Logic Compatibility,
		VIL= 0.8V (Max), VIH = 2V (Min)			CD74HCT85E		-55 to 125		16 Ld PDIP	E16.3
		- CMOS Input Compatibility, Il ≤ 1 A at VOL, VOH
					CD74HC85M		-55 to 125		16 Ld SOIC	M16.15
					CD74HCT85M		-55 to 125		16 Ld SOIC	M16.15
					NOTES:
					1. When ordering, use the entire part number. Add the suffix 96 to
					obtain the variant in the tape and reel.
					2. Die for this part number is available which meets all electrical
					specifications. Please contact your local sales office or Harris
					customer service for ordering information.

Pinout

CD74HC85, CD74HCT85

(PDIP, SOIC)

TOP VIEW

B3

1

16 VCC

(A < B) IN

2

15

A3

(A = B) IN

3

14

B2

(A > B) IN

4

13

A2

(A > B) OUT

5

12 A1

(A = B) OUT

6

11 B1

(A < B) OUT

7

10 A0

GND

8

9

B0

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.	File Number 1770.1

Copyright © Harris Corporation 1997

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CD74HC85, CD74HCT85

Functional Diagram

A3

A2

A1

A0

(A < B) IN (A = B) IN (A > B) IN

B3

B2

B1

B0

15
13
12
10
		7
2			(A < B) OUT
		6
3			(A = B) OUT
4		5	(A > B) OUT
1
14
11
9

TRUTH TABLE

	COMPARING INPUTS			CASCADING INPUTS				OUTPUTS
A3, B3	A2, B2	A1, B1	A0, B0	A > B	A < B	A = B	A > B	A < B	A = B
SINGLE DEVICE OR SERIES CASCADING
A3 > B3	X	X	X	X	X	X	H	L	L
A3 < B3	X	X	X	X	X	X	L	H	L
A3 = B3	A2 >B2	X	X	X	X	X	H	L	L
A3 = B3	A2 < B2	X	X	X	X	X	L	H	L
A3 = B3	A2 = B2	A1 > B1	X	X	X	X	H	L	L
A3 = B3	A2 = B2	A1 < B1	X	X	X	X	L	H	L
A3 = B3	A2 = B2	A1 = B1	A0 > B0	X	X	X	H	L	L
A3 = B3	A2 = B2	A1 = B1	A0 < B0	X	X	X	L	H	L
A3 = B3	A2 = B2	A1 = B1	A0 = B0	H	L	L	H	L	L
A3 = B3	A2 = B2	A1 = B1	A0 = B0	L	H	L	L	H	L
A3 = B3	A2 = B2	A1 = B1	A0 = B0	L	L	H	L	L	H
PARALLEL CASCADING
A3 = B3	A2 = B2	A1 = B1	A0 = B0	X	X	H	L	L	H
A3 = B3	A2 = B2	A1 = B1	A0 = B0	H	H	L	L	L	L
A3 = B3	A2 = B2S	A1 = B1	A0 = B0	L	L	L	H	H	L

NOTE: H = High Voltage Level, L = Low Voltage, Level, X = Don’t Care

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CD74HC85, CD74HCT85

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .	-0.5V to 7V
DC Input Diode Current, IIK	±20mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .
DC Output Diode Current, IOK	±20mA
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .
DC Output Source or Sink Current per Output Pin, IO	±25mA
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .
DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . .	. . . .±50mA

Thermal Information
Thermal Resistance (Typical, Note 3)	θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 190
Maximum Junction Temperature . . . . . . . . . . . . . . . .	. . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .	-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . .	. . . . . . . 300oC
(SOIC - Lead Tips Only)

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

		TEST				25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS		VCC
PARAMETER	SYMBOL	VI (V)	IO (mA)	(V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HC TYPES
High Level Input	VIH	-	-	2	1.5	-	-	1.5	-	1.5	-	V
Voltage
				4.5	3.15	-	-	3.15	-	3.15	-	V
				6	4.2	-	-	4.2	-	4.2	-	V
Low Level Input	VIL	-	-	2	-	-	0.5	-	0.5	-	0.5	V
Voltage
				4.5	-	-	1.35	-	1.35	-	1.35	V
				6	-	-	1.8	-	1.8	-	1.8	V
High Level Output	VOH	VIH or VIL	-0.02	2	1.9	-	-	1.9	-	1.9	-	V
Voltage
			-0.02	4.5	4.4	-	-	4.4	-	4.4	-	V
CMOS Loads
			-0.02	6	5.9	-	-	5.9	-	5.9	-	V
High Level Output			-	-	-	-	-	-	-	-	-	V
Voltage
			-4	4.5	3.98	-	-	3.84	-	3.7	-	V
TTL Loads
			-5.2	6	5.48	-	-	5.34	-	5.2	-	V
Low Level Output	VOL	VIH or VIL	0.02	2	-	-	0.1	-	0.1	-	0.1	V
Voltage
			0.02	4.5	-	-	0.1	-	0.1	-	0.1	V
CMOS Loads
			0.02	6	-	-	0.1	-	0.1	-	0.1	V
Low Level Output			4	4.5	-	-	0.26	-	0.33	-	0.4	V
Voltage
TTL Loads
			5.2	6	-	-	0.26	-	0.33	-	0.4	V
Input Leakage	II	VCC or	-	6	-	-	±0.1	-	±1	-	±1	µA
Current		GND
Quiescent Device	ICC	VCC or	0	6	-	-	8	-	80	-	160	µA
Current		GND

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