Texas Instruments CY74FCT16952ETPVCT, CY74FCT16952ETPVC, CY74FCT16952CTPACT, CY74FCT16952CTPAC, CY74FCT16952ATPVCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.

CY74FCT16952T

CY74FCT162952T

CY74FCT162H952T

SCCS065A - August 1994 - Revised March 2000

Features

•FCT-E speed at 3.7 ns

•Power-off disable outputs permits live insertion

•Edge-rate control circuitry for significantly improved noise characteristics

•Typical output skew < 250 ps

•ESD > 2000V

•TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages

•Industrial temperature range of –40˚C to +85˚C

•VCC = 5V ± 10%

CY74FCT16952T Features:

•64 mA sink current, 32 mA source current

•Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C

CY74FCT162952T Features:

•Balanced 24 mA output drivers

•Reduced system switching noise

•Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C

CY74FCT162H952T Features:

• Bus hold retains last active state

16-Bit Registered Transceivers

•Eliminates the need for external pull-up or pull-down resistors

Functional Description

These 16-bit registered transceivers are high-speed, low-power devices. 16-bit operation is achieved by connecting the control lines of the two 8-bit registered transceivers together. For data flow from bus A-to-B, CEAB must be LOW to allow data to be stored when CLKAB transitions from LOW-to-HIGH. The stored data will be present on the output when OEAB is LOW. Control of data from B-to-A is similar and is controlled by using the CEBA, CLKBA, and OEBA inputs. The output buffers are designed with a power-off disable feature to allow for live insertion of boards.

The CY74FCT16952T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

The CY74FCT162952T has 24-mA balanced output drivers with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162952T is ideal for driving transmission lines.

The CY74FCT162H952T is a 24-mA balanced output part that has “bus hold” on the data inputs. The device retains the input’s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.

Logic Block Diagrams						Pin Configuration
							SSOP/TSSOP
							Top View
1CEBA			2CEBA			1 OEAB	1	56	1OEBA
						1 CLKAB	2	55	1 CLKBA
1 CLKBA			2 CLKBA			1 CEAB	3	54	1CEBA
1OEAB			2OEAB			GND	4	53	GND
						1A1	5	52	1B1
1CEAB			2CEAB			1A2	6	51	1B2
1 CLKAB			2 CLKAB			VCC	7	50	VCC
						1A3	8	49	1B3
1OEBA			2OEBA			1A4	9	48	1B4
	C			C		1A5	10	47	1B5
1A1	CE	1B1	2A1	CE	2B	GND	11	46	GND
	D			D		1	12	45	1B6
						1A6
	C			C		1A7	13	44	1B7
	CE			CE
						1A8	14	43	1B8
	D			D
						2A1	15	42	2B1
						2A2	16	41	2B2
		FCT16952–1			FCT16952–2	2A3	17	40	2B3
	TO 7 OTHER CHANNELS			TO 7 OTHER CHANNELS		GND	18	39	GND
						2A4	19	38	2B4
						2A5	20	37	2B5
						2A6	21	36	2B6
						VCC	22	35	VCC
						2A7	23	34	2B7
						2A8	24	33	2B8
						GND	25	32	GND
						2CEAB	26	31	2CEBA
						2 CLKAB	27	30	2 CLKBA
						2OEAB	28	29	2OEBA
							FCT16952–3

Copyright © 2000, Texas Instruments Incorporated

CY74FCT16952T

CY74FCT162952T

CY74FCT162H952T

Pin Description

		Name			Description
					A-to-B Output Enable Input (Active LOW)
		OEAB
					B-to-A Output Enable Input (Active LOW)
	OEBA
					A-to-B Clock Enable Input (Active LOW)
	CEAB
					B-to-A Clock Enable Input (Active LOW)
	CEBA
	CLKAB				A-to-B Clock Input
	CLKBA				B-to-A Clock Input
	A				A-to-B Data Inputs or B-to-A Three-State
					Outputs[1]
	B				B-to-A Data Inputs or A-to-B Three-State
					Outputs[1]

Maximum Ratings[5, 6]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–55°C to +125°C
Ambient Temperature with	–55°C to +125°C
Power Applied.............................................
DC Input Voltage ...........................................	–0.5V to +7.0V
DC Output Voltage.........................................	–0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin) ........................	–60 to +120 mA
Power Dissipation ..........................................................	1.0W
Static Discharge Voltage............................................	>2001V
(per MIL-STD-883, Method 3015)

Function Table[2, 3]

For A-to-B (Symmetric with B-to-A)

						Inputs					Outputs
			CLKAB							A	B
	CEAB							OEAB
	H		X					L		X	B[4]
	X		L					L		X	B[4]
	L							L		L	L
	L							L		H	H
	X		X					H		X	Z

Notes:

Operating Range

	Ambient
Range	Temperature	VCC
Industrial	–40°C to +85°C	5V ± 10%

1.On the CY74FCT162H952T these pins have bus hold.

2.A-to-B data flow is shown: B-to-A data flow is similar but uses, CEBA, CLKBA, and OEBA.

3.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.

= LOW-to-HIGH Transition.

Z = HIGH Impedance.

4.Level of B before the indicated steady-state input conditions were established.

5.Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.

6.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

2

CY74FCT16952T

CY74FCT162952T

CY74FCT162H952T

Electrical Characteristics Over the Operating Range

Parameter

Description

Test Conditions

Min.

Typ.[7]

Max.

Unit

VIH

Input HIGH Voltage

2.0

V

VIL

Input LOW Voltage

0.8

V

VH

Input Hysteresis[8]

100

mV

VIK

Input Clamp Diode Voltage

VCC=Min., IIN= –18 mA

–0.7

–1.2

V

IIH

Input HIGH Current

Standard

VCC=Max., VI=VCC

±1

A

Bus Hold

±100

IIL

Input LOW Current

Standard

VCC=Max., VI=GND

±1

A

Bus Hold

±100

A

I

BBH

Bus Hold Sustain Current on Bus Hold Input[9]

V

CC

=Min.

V =2.0V

–50

A

I

IBBL

VI=0.8V

+50

A

I

BHHO

Bus Hold Overdrive Current on Bus Hold Input[9]

V

CC

=Max., V =1.5V

TBD

mA

I

IBHLO

IOZH

High Impedance Output Current (Three-State

VCC=Max., VOUT=2.7V

±1

A

Output pins)

IOZL

High Impedance Output Current (Three-State

VCC=Max., VOUT=0.5V

±1

A

Output pins)

I

OS

Short Circuit Current[10]

V

CC

=Max., V

=GND

–80

–140

–200

mA

OUT

I

O

Output Drive Current[10]

V

CC

=Max., V

=2.5V

–50

–180

mA

OUT

I

OFF

Power-Off Disable

V

CC

=0V, V

≤4.5V[11]

±1

A

OUT

Output Drive Characteristics for CY74FCT16952T

Parameter	Description	Test Conditions	Min.	Typ.[7]	Max.	Unit
VOH	Output HIGH Voltage	VCC=Min., IOH= –3 mA	2.5	3.5		V
		VCC=Min., IOH= –15 mA	2.4	3.5		V
		VCC=Min., IOH= –32 mA	2.0	3.0		V
VOL	Output LOW Voltage	VCC=Min., IOL=64 mA		0.2	0.55	V

Output Drive Characteristics for CY74FCT162952T, CY74FCT162H952T

Parameter

Description

Test Conditions

Min.

Typ.[7]

Max.

Unit

I

ODL

Output LOW Current[10]

V

=5V, V

IN

=V

IH

or V

, V =1.5V

60

115

150

mA

CC

IL

OUT

IODH

Output HIGH Current[10]

VCC=5V, VIN=VIH or VIL, VOUT=1.5V

–60

–115

–150

mA

VOH

Output HIGH Voltage

VCC=Min., IOH= –24 mA

2.4

3.3

V

VOL

Output LOW Voltage

VCC=Min., IOL=24 mA

0.3

0.55

V

Capacitance[8] (T = +25˚C, f = 1.0 MHz)

A

Parameter

Description

Test Conditions

Typ.[7]

Max.

Unit

CIN

Input Capacitance

VIN = 0V

4.5

6.0

pF

COUT

Output Capacitance

VOUT = 0V

5.5

8.0

pF

Note:

7.Typical values are at VCC= 5.0V, TA= +25˚C ambient.

8.This parameter is specified but not tested.

9.Pins with bus hold are described in the Pin Description.

10.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

11.Tested at +25˚C.

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