Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT16823T
CY74FCT162823T
SCCS062 - August 1994 - Revised March 2000
Features
•FCT-E speed at 4.4 ns
•Power-off disable outputs permits live insertion
•Edge-rate control circuitry for significantly improved noise characteristics
•Typical output skew < 250 ps
•ESD > 2000V
•TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
•Industrial temperature range of−40˚C to +85˚C
•VCC = 5V ± 10%
CY74FCT16823T Features: |
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• 64 mA sink current, 32 mA source current |
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• Typical V |
(ground bounce) <1.0V at V |
CC |
= 5V, |
OLP |
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TA = 25˚C
18-Bit Registers
CY74FCT162823T Features:
•Balanced 24 mA output drivers
•Reduced system switching noise
• Typical V |
(ground bounce) <0.6V at V |
CC |
= 5V, |
OLP |
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TA= 25˚C |
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Functional Description
The CY74FCT16823T and the CY74FCT162823T 18-bit bus interface registers are designed for use in high-speed, low-power systems needing wide registers and parity. 18-bit operation is achieved by connecting the control lines of the two 9-bit registers. Flow-through pinout and small shrink packaging aids in simplifying board layout. The outputs are designed with a power-off disable feature to allow live insertion of boards.
The CY74FCT16823T is ideally suited for driving high-capacitance loads and low-impedance backplanes.
The CY74FCT162823T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162823T is ideal for driving transmission lines.
Logic Block Diagrams |
Pin Configuration |
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SSOP/TSSOP |
1OE |
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Top View |
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1CLR |
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1CLK |
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1CLKEN |
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R |
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C |
1Q1 |
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D |
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1D1 |
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TO 8 OTHER CHANNELS |
FCT16823-1 |
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2OE |
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2CLR |
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2CLK |
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2CLKEN |
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R |
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C |
2Q1 |
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D |
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2D2 |
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1 |
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1 |
56 |
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1CLK |
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CLR |
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55 |
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1 |
OE |
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2 |
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1 |
CLKEN |
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1Q1 |
3 |
54 |
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1D1 |
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GND |
4 |
53 |
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GND |
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1Q2 |
5 |
52 |
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1D2 |
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1Q3 |
6 |
51 |
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1D3 |
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VCC |
7 |
50 |
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VCC |
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1Q4 |
8 |
49 |
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1D4 |
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1Q5 |
9 |
48 |
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1D5 |
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1Q6 |
10 |
47 |
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1D6 |
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GND |
11 |
46 |
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GND |
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1Q7 |
12 |
45 |
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1D7 |
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1Q8 |
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13 |
44 |
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1D8 |
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1Q9 |
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14 |
43 |
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1D9 |
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2Q1 |
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15 |
42 |
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2D1 |
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2D2 |
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2Q2 |
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16 |
41 |
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2Q3 |
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17 |
40 |
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2D3 |
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GND |
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18 |
39 |
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GND |
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2Q4 |
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19 |
38 |
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2D4 |
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2Q5 |
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20 |
37 |
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2D5 |
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2Q6 |
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21 |
36 |
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2D6 |
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35 |
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VCC |
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22 |
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VCC |
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2Q7 |
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23 |
34 |
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2D7 |
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33 |
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2Q8 |
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24 |
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2D8 |
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32 |
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GND |
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25 |
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GND |
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2Q9 |
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26 |
31 |
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2D9 |
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2 |
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27 |
30 |
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OE |
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2 |
CLKEN |
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2 |
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29 |
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2CLK |
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CLR |
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28 |
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FCT16823-2 |
FCT16823-3 |
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TO 8 OTHER CHANNELS
Copyright © 2000, Texas Instruments Incorporated
CY74FCT16823T
CY74FCT162823T
Pin Description
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Name |
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Description |
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D |
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Data Inputs |
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CLK |
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Clock Inputs |
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Clock Enable Inputs (Active LOW) |
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CLKEN |
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Asynchronous Clear Inputs (Active LOW) |
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CLR |
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Output Enable Inputs (Active LOW) |
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OE |
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Q |
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Three-State Outputs |
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Function Table[1]
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Inputs |
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Outputs |
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CLK |
D |
Q |
Function |
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OE |
CLR |
CLKEN |
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H |
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X |
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X |
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X |
X |
Z |
High Z |
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L |
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L |
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X |
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X |
X |
L |
Clear |
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L |
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H |
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H |
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X |
X |
Q[2] |
Hold |
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H |
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H |
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L |
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L |
Z |
Load |
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H |
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H |
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L |
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H |
Z |
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L |
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H |
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L |
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L |
L |
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L |
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H |
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L |
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H |
H |
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Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ..................................... |
−55°C to +125°C |
Ambient Temperature with |
−55°C to +125°C |
Power Applied .................................................. |
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DC Input Voltage ................................................. |
−0.5V to +7.0V |
DC Output Voltage .............................................. |
−0.5V to +7.0V |
DC Output Current |
−60 to +120 mA |
(Maximum Sink Current/Pin) ........................... |
Notes:
1.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
Z = HIGH Impedance.
=LOW-to-HIGH transition.
Power Dissipation .......................................................... |
1.0W |
Static Discharge Voltage............................................ |
>2001V |
(per MIL-STD-883, Method 3015) |
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Operating Range
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Ambient |
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Range |
Temperature |
VCC |
Industrial |
−40°C to +85°C |
5V ± 10% |
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2.Output level before indicated steady-state input conditions were established.
3.Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
4.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
2
CY74FCT16823T
CY74FCT162823T
Electrical Characteristics Over the Operating Range
Parameter |
Description |
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Test Conditions |
Min. |
Typ.[5] |
Max. |
Unit |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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VH |
Input Hysteresis[6] |
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100 |
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mV |
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VIK |
Input Clamp Diode Voltage |
VCC=Min., IIN=−18 mA |
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−0.7 |
−1.2 |
V |
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IIH |
Input HIGH Current |
VCC=Max., VI=VCC |
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±1 |
µA |
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IIL |
Input LOW Current |
VCC=Max., VI=GND |
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±1 |
µA |
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IOZH |
High Impedance Output Current |
VCC=Max., VOUT=2.7V |
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±1 |
µA |
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(Three-State Output pins) |
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IOZL |
High Impedance Output Current |
VCC=Max., VOUT=0.5V |
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±1 |
µA |
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(Three-State Output pins) |
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I |
OS |
Short Circuit Current[7] |
V |
CC |
=Max., V |
=GND |
−80 |
−140 |
−200 |
mA |
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OUT |
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I |
O |
Output Drive Current[7] |
V |
CC |
=Max., V |
=2.5V |
−50 |
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−180 |
mA |
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OUT |
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I |
OFF |
Power-Off Disable |
V |
CC |
=0V, V |
≤4.5V[8] |
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1 |
µA |
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OUT |
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Output Drive Characteristics for CY74FCT16823T
Parameter |
Description |
Test Conditions |
Min. |
Typ.[5] |
Max. |
Unit |
VOH |
Output HIGH Voltage |
VCC=Min., IOH=−3 mA |
2.5 |
3.5 |
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V |
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VCC=Min., IOH=−15 mA |
2.4 |
3.5 |
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VCC=Min., IOH=−32 mA |
2.0 |
3.0 |
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VOL |
Output LOW Voltage |
VCC=Min., IOL=64 mA |
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0.2 |
0.55 |
V |
Output Drive Characteristics for CY74FCT162823T
Parameter |
Description |
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Test Conditions |
Min. |
Typ.[5] |
Max. |
Unit |
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IODL |
Output LOW Voltage[7] |
VCC=5V, VIN=VIH or VIL, VOUT=1.5V |
60 |
115 |
150 |
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mA |
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I |
ODH |
Output HIGH Voltage[7] |
V =5V, V |
=V |
IH |
or V |
, V =1.5V |
−60 |
−115 |
−150 |
mA |
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CC |
IN |
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IL OUT |
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VOH |
Output HIGH Voltage |
VCC=Min., IOH=−24 mA |
2.4 |
3.3 |
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V |
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VOL |
Output LOW Voltage |
VCC=Min., IOL=24 mA |
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0.3 |
0.55 |
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V |
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Capacitance[9] (T = +25˚C, f = 1.0 MHz) |
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A |
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Parameter |
Description |
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Test Conditions |
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Typ.[5] |
Max. |
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Unit |
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CIN |
Input Capacitance |
VIN = 0V |
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4.5 |
6.0 |
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pF |
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COUT |
Output Capacitance |
VOUT = 0V |
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5.5 |
8.0 |
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Notes: |
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5.Typical values are at VCC= 5.0V, TA= +25˚C ambient.
6.This input is specified but not tested.
7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.
8.Tested at +25˚C.
9.This parameter is specified but not tested.
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