Texas Instruments CD74HCT244M96, CD74HCT244M, CD74HCT244E, CD74HCT241M96, CD74HCT241E Datasheet

						CD74HC240, CD74HCT240,
						CD74HC241, CD74HCT241,
	Data sheet acquired from Harris Semiconductor					CD74HC244, CD74HCT244
	SCHS167					High Speed CMOS Logic
	November 1997					Octal Buffer/Line Drivers, Three-State
	Features
	•	CD74HC/HCT240 Inverting
[ /Title	•	CD74HC/HCT241 Non-Inverting
(CD74	•	CD74HC/HCT244 Non-Inverting
HC240	• Typical Propagation Delay = 8ns at VCC = 5V,
,		C	L	= 15pF, T = 25oC for HC240
					A
CD74	•	Three-State Outputs
HCT24	•	Buffered Inputs
0,	• High-Current Bus Driver Outputs
CD74	• Fanout (Over Temperature Range)
HC241		- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
,		-	Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
CD74	• Wide Operating Temperature Range . . . -55oC to 125oC
HCT24	• Balanced Propagation Delay and Transition Times
1,	• Significant Power Reduction Compared to LSTTL
CD74		Logic ICs
HC244	• HC Types
,		- 2V to 6V Operation
CD74		- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
			at VCC = 5V

•HCT Types

-4.5V to 5.5V Operation

-Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

-CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Pinout

CD74HC240, CD74HCT240, CD74HC241, CD74HCT241,

	CD74HC244, CD74HCT244
			(PDIP, SOIC)
			TOP VIEW
	241			241
240	244			244	240
1OE	1OE	1	20	VCC	VCC
1A0	1A0	2	19	2OE (241) 2OE (240, 244)
2Y3	2Y3	3	18	1Y0	1Y0
1A1	1A1	4	17	2A3	2A3
2Y2	2Y2	5	16	1Y1	1Y1
1A2	1A2	6	15	2A2	2A2
2Y1	2Y1	7	14	1Y2	1Y2
1A3	1A3	8	13	2A1	2A1
2Y0	2Y0	9	12	1Y3	1Y3
GND	GND	10	11	2A0	2A0

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.	File Number 1656.1

Copyright © Harris Corporation 1997

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CD74HC240, CD74HCT240, CD74HC241, CD74HCT241, CD74HC244, CD74HCT244

Description

The Harris CD74HC240 and CD74HCT240 are inverting three-state buffers having two active-low output enables. The Harris CD74HC241, CD74HCT241, CD74HC244 and CD74HCT244 are non-inverting three-state buffers that differ only in that the 241 has one active-high and one active-low output enable, and the 244 has two active-low output enables. All three types have identical pinouts.

Ordering Information

	TEMP. RANGE		PKG.
PART NUMBER	(oC)	PACKAGE	NO.
CD74HC240E	-55 to 125	20 Ld PDIP	E20.3
CD74HCT240E	-55 to 125	20 Ld PDIP	E20.3
CD74HC241E	-55 to 125	20 Ld PDIP	E20.3
CD74HCT241E	-55 to 125	20 Ld PDIP	E20.3
CD74HC244E	-55 to 125	20 Ld PDIP	E20.3

Ordering Information

	TEMP. RANGE		PKG.
PART NUMBER	(oC)	PACKAGE	NO.
CD74HCT244E	-55 to 125	20 Ld PDIP	E20.3
CD74HC240M	-55 to 125	20 Ld SOIC	M20.3
CD74HCT241M	-55 to 125	20 Ld SOIC	M20.3
CD74HCT240M	-55 to 125	20 Ld SOIC	M20.3
CD74HC244M	-55 to 125	20 Ld SOIC	M20.3
CD74HCT244M	-55 to 125	20 Ld SOIC	M20.3
NOTES:

1.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

2.Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or

Harris customer service for ordering information.

Functional Diagram

									241
												AND
									244						240
		2							18
													1Y0
		1A0														1Y0
		4							16				1Y1
		1A1														1Y1
		6							14				1Y2
		1A2														1Y2
		8							12				1Y3
		1A3														1Y3
									9
		11											2Y0
		2A0														2Y0
		13							7				2Y1
		2A1														2Y1
									5
		15											2Y2
240		2A2														2Y2
		17							3				2Y3
AND		2A3														2Y3
244		241
			1										VCC = 20
1OE		1OE											GND = 10
							19
		2OE
2OE

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CD74HC240, CD74HCT240, CD74HC241, CD74HCT241, CD74HC244, CD74HCT244

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .	-0.5V to 7V
DC Input Diode Current, IIK	±20mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .
DC Output Diode Current, IOK	±20mA
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .
DC Drain Current, per Output, IO	±35mA
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .
DC Output Source or Sink Current per Output Pin, IO	±25mA
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . .	. . . .±70mA

Thermal Information
Thermal Resistance (Typical, Note 3)	θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 125
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 120
Maximum Junction Temperature . . . . . . . . . . . . . . . .	. . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .	-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . .	. . . . . . . 300oC
(SOIC - Lead Tips Only)

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

		TEST				25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS
PARAMETER	SYMBOL	VI (V)	IO (mA)	VCC (V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HC TYPES
High Level Input	VIH	-	-	2	1.5	-	-	1.5	-	1.5	-	V
Voltage
				4.5	3.15	-	-	3.15	-	3.15	-	V
				6	4.2	-	-	4.2	-	4.2	-	V
Low Level Input	VIL	-	-	2	-	-	0.5	-	0.5	-	0.5	V
Voltage
				4.5	-	-	1.35	-	1.35	-	1.35	V
				6	-	-	1.8	-	1.8	-	1.8	V
High Level Output	VOH	VIH or	-0.02	2	1.9	-	-	1.9	-	1.9	-	V
Voltage		VIL
			-0.02	4.5	4.4	-	-	4.4	-	4.4	-	V
CMOS Loads
			-0.02	6	5.9	-	-	5.9	-	5.9	-	V
High Level Output			-6	4.5	3.98	-	-	3.84	-	3.7	-	V
Voltage
			-7.8	6	5.48	-	-	5.34	-	5.2	-	V
TTL Loads
Low Level Output	VOL	VIH or	0.02	2	-	-	0.1	-	0.1	-	0.1	V
Voltage		VIL
			0.02	4.5	-	-	0.1	-	0.1	-	0.1	V
CMOS Loads
			0.02	6	-	-	0.1	-	0.1	-	0.1	V
Low Level Output			6	4.5	-	-	0.26	-	0.33	-	0.4	V
Voltage
			7.8	6	-	-	0.26	-	0.33	-	0.4	V
TTL Loads
Input Leakage	II	VCC or	-	6	-	-	±0.1	-	±1	-	±1	μA
Current		GND
Quiescent Device	ICC	VCC or	0	6	-	-	8	-	80	-	160	μA
Current		GND

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