Texas Instruments CY74FCT163H244CPVC, CY74FCT163H244CPAC, CY74FCT163244CPVCT, CY74FCT163244CPVC, CY74FCT163244CPACT Datasheet

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Texas Instruments CY74FCT163H244CPVC, CY74FCT163H244CPAC, CY74FCT163244CPVCT, CY74FCT163244CPVC, CY74FCT163244CPACT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modified to remove devices not offered.

CY74FCT163244

CY74FCT163H244

SCCS046 - December 1996 - Revised March 2000

Features

Low power, pin-compatible replacement for LCX and LPT families

5V tolerant inputs and outputs

24 mA balanced drive outputs

Power-off disable outputs permits live insertion

Edge-rate control circuitry for reduced noise

FCT-C speed at 4.1 ns

Latch-up performance exceeds JEDEC standard no. 17

Typical output skew < 250 ps

Industrial temperature range of –40˚C to +85˚C

TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)

TypicalVolp (ground bounce) performance exceeds Mil Std 883D

VCC = 2.7V to 3.6V

ESD (HBM) > 2000V

16-Bit Buffers/Line Drivers

CY74FCT163H244

Bus hold on data inputs

Eliminates the need for external pull-up or pull-down resistors

Devices with bus hold are not recommended for translating rail-to-rail CMOS signals to 3.3V logic levels

Functional Description

These 16-bit buffers/line drivers are designed for use in memory driver, clock driver, or other bus interface applications, where high-speed and low power are required. The three-state controls are designed to allow 4-bit, 8-bit or combined 16-bit operation. Flow-through pinout and small shrink packaging simplifies board layout.

The CY74FCT163244 has 24-mA balanced output drivers with current limiting resistors in the outputs.

The CY74FCT163H244 has “bus hold” on the data inputs, which retains the last state of the input whenever the source driving the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.

Logic Block Diagrams CY74FCT163244, CY74FCT163H244

 

Pin Configuration

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SSOP/TSSOP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Top View

 

 

 

1

OE

 

 

 

 

 

 

3

OE

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

OE

48

 

2

OE

 

 

1A1

 

 

 

1Y1

 

3A1

 

 

3Y1

1Y1

2

47

 

1A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1Y2

3

46

 

1A2

1A2

 

 

 

1Y2

3A2

 

 

3Y2

GND

4

45

 

GND

 

 

 

 

 

 

 

 

 

 

 

1Y3

5

44

 

1A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1Y4

 

 

 

163244

 

1A4

1A3

 

 

 

 

3A3

 

 

 

6

163H244 43

 

 

 

 

1Y3

 

 

3Y3

VCC

7

42

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y1

 

2A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

41

 

1A4

 

 

 

1Y4

3A4

3Y4

2Y2

9

40

 

2A2

 

 

 

GND

10

39

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y3

11

38

 

2A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y4

12

37

 

2A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3Y1

 

 

13

36

 

3A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

OE

 

 

 

 

4

OE

 

 

3Y2

 

 

14

35

 

3A2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

15

34

 

GND

 

 

2A1

 

 

2Y1

 

4A1

4Y1

3Y3

 

 

16

33

 

3A3

 

 

 

 

 

 

 

17

32

 

 

 

 

 

 

3Y4

 

 

 

3A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

 

 

2A2

 

 

 

 

4A2

 

VCC

 

 

18

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y2

 

4Y2

4Y1

 

 

19

30

 

4A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4Y2

 

 

20

29

 

4A2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

21

28

 

GND

 

2A3

 

 

2Y3

 

4A3

4Y3

4Y3

 

 

22

27

 

4A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2A4

 

 

 

 

4A4

 

 

 

 

 

4Y4

 

 

23

26

 

4A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

3

 

 

 

 

 

2Y4

 

 

 

 

4Y4

OE

 

 

24

25

 

OE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Copyright © 2000, Texas Instruments Incorporated

CY74FCT163244

CY74FCT163H244

Pin Description

Name

Description

 

 

 

 

 

 

 

Three-State Output Enable Inputs (Active LOW)

 

OE

 

 

 

 

A

Data Inputs[1]

 

Y

Three-State Outputs

 

 

 

 

Function Table[2]

 

 

Inputs

Outputs

 

 

 

 

 

 

 

 

A

Y

 

OE

 

 

 

 

 

 

L

 

L

L

 

 

 

 

 

 

L

 

H

H

 

 

 

 

 

 

H

 

X

Z

 

 

 

 

 

Maximum Ratings[3,4]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................

–55°C to +125°C

Ambient Temperature with

–55°C to +125°C

Power Applied............................................

Supply Voltage Range .....................................

0.5V to +4.6V

DC Input Voltage ...........................................

–0.5V to +7.0V

DC Output Voltage.........................................

–0.5V to +7.0V

DC Output Current

 

(Maximum Sink Current/Pin) ........................

–60 to +120 mA

Power Dissipation ..........................................................

1.0W

Operating Range

 

Ambient

 

Range

Temperature

VCC

Industrial

–40°C to +85°C

2.7V to 3.6V

 

 

 

Electrical Characteristics for Non Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V

 

Parameter

Description

 

 

Test Conditions

Min.

Typ.[5]

Max.

Unit

VIH

Input HIGH Voltage

All Inputs

 

 

2.0

 

5.5

V

VIL

Input LOW Voltage

 

 

 

 

 

 

 

0.8

V

VH

Input Hysteresis[6]

 

 

 

 

 

 

100

 

mV

VIK

Input Clamp Diode Voltage

VCC=Min., IIN=–18 mA

 

–0.7

– 1.2

V

IIH

Input HIGH Current

VCC=Max., VI=5.5

 

 

±1

µA

IIL

Input LOW Current

VCC=Max., VI=GND

 

 

±1

µA

IOZH

High Impedance Output Current

VCC=Max., VOUT=5.5V

 

 

±1

µA

 

 

(Three-State Output pins)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZL

High Impedance Output Current

VCC=Max., VOUT=GND

 

 

±1

µA

 

 

(Three-State Output pins)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I

OS

Short Circuit Current[7]

V

CC

=Max., V

=GND

–60

–135

–240

mA

 

 

 

OUT

 

 

 

 

 

 

IOFF

Power-Off Disable

VCC=0V, VOUT≤4.5V

 

 

±100

µA

ICC

Quiescent Power Supply Current

VIN≤0.2V,

 

VCC=Max.

 

0.1

10

µA

 

 

 

VIN>VCC–0.2V

 

 

 

 

 

 

 

ICC

Quiescent Power Supply Current

VIN=VCC–0.6V[8]

 

VCC=Max.

 

2.0

30

µA

 

 

(TTL inputs HIGH)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

 

 

 

 

 

 

 

 

 

 

1.On the CY74FCT163H244, these pins have “bus hold.”

2.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.

3.Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.

4.With the exception of inputs with bus hold, unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

5.Typical values are at VCC=3.3V, TA = +25˚C ambient.

6.This parameter is specified but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

8.Per TTL driven input; all other inputs at VCC or GND.

2

CY74FCT163244

CY74FCT163H244

Electrical Characteristics For Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V

Parameter

Description

 

Test Conditions

Min.

Typ.[5]

Max.

Unit

VIH

Input HIGH Voltage

All Inputs

 

 

 

2.0

 

VCC

V

VIL

Input LOW Voltage

 

 

 

 

 

 

 

 

 

0.8

V

VH

Input Hysteresis[6]

 

 

 

 

 

 

 

 

100

 

mV

VIK

Input Clamp Diode Voltage

VCC=Min., IIN=–18 mA

 

–0.7

–1.2

V

IIH

Input HIGH Current

VCC=Max., VI=VCC

 

 

 

±100

µA

IIL

Input LOW Current

 

 

 

 

 

 

 

 

 

±100

µA

I

BBH

Bus Hold Sustain Current on Bus Hold Input[9]

V

=Min.

 

V

=2.0V

–50

 

 

µA

 

 

CC

 

 

 

 

I

 

 

 

 

 

IBBL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VI=0.8V

+50

 

 

µA

 

 

 

 

 

 

 

 

 

 

IBHHO

Bus Hold Overdrive Current on Bus Hold In-

VCC=Max., VI=1.5V

 

 

 

±500

µA

IBHLO

put[9]

 

 

 

 

 

 

 

 

 

 

 

IOZH

High Impedance Output Current

VCC=Max., VOUT=VCC

 

 

±1

µA

 

 

(Three-State Output pins)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZL

High Impedance Output Current

VCC=Max., VOUT=GND

 

 

±1

µA

 

 

(Three-State Output pins)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I

OS

Short Circuit Current[7]

V

=Max., V

=GND

–60

–135

–240

mA

 

 

CC

 

 

OUT

 

 

 

 

 

 

 

IOFF

Power-Off Disable

VCC=0V, VOUT≤4.5V

 

 

 

±100

µA

ICC

Quiescent Power Supply Current

VIN≤0.2V,

 

VCC=Max.

 

 

+40

µA

 

 

 

VIN>VCC–0.2V

 

 

 

 

 

 

 

 

ICC

Quiescent Power supply Current

V =V

CC

–0.6V[8]

 

VCC=Max.

 

 

+350

µA

 

(TTL inputs HIGH)

IN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Characteristics For Balanced Drive Devices Over the Operating Range VCC=2.7V to 3.6V

 

Parameter

Description

 

Test Conditions

Min.

Typ.[5]

Max.

Unit

I

ODL

Output LOW Dynamic Current[7]

V

=3.3V, V

IN

=V

IH

45

 

180

mA

 

 

CC

 

 

 

 

 

 

 

 

 

 

or VIL, VOUT=1.5V

 

 

 

 

IODH

Output HIGH Dynamic Current[7]

VCC=3.3V, VIN=VIH

–45

 

–180

mA

 

 

 

or VIL, VOUT=1.5V

 

 

 

 

VOH

Output HIGH Voltage

VCC=Min., IOH= –0.1 mA

VCC–0.2

 

 

V

 

 

 

V

=3.0V, I

OH

= –8 mA

2.4[10]

3.0

 

V

 

 

 

CC

 

 

 

 

 

 

 

 

 

 

VCC=3.0V, IOH= –24 mA

2.0

3.0

 

V

VOL

Output LOW Voltage

VCC=Min., IOL= 0.1mA

 

 

0.2

V

 

 

 

VCC=Min., IOL= 24 mA

 

0.3

0.55

 

Notes:

 

 

 

 

 

 

 

 

 

 

 

9.Pins with bus hold are described in Pin Description.

10. VOH = VCC – 0.6V at rated current.

3

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