Texas Instruments CY74FCT191CTSOCT, CY74FCT191CTSOC, CY74FCT191CTQCT, CY74FCT191CTQC, CY74FCT191ATSOCT Datasheet

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Texas Instruments CY74FCT191CTSOCT, CY74FCT191CTSOC, CY74FCT191CTQCT, CY74FCT191CTQC, CY74FCT191ATSOCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.

SCCS016 - May 1994 - Revised February 2000

CY74FCT191T

4-Bit Up/Down Binary Counter

Features

Function, pinout, and drive compatible with FCT and F logic

FCT-C speed at 6.2 ns max,

FCT-A speed at 7.8 ns max.

• Reduced V (typically = 3.3V) versions of equivalent

OH

FCT functions

Edge-rate control circuitry for significantly improved noise characteristics

Power-off disable permits live insertion

ESD > 2000V

Matched rise and fall times

Functional Description

The FCT191T is a reversible modulo-16 binary counter, featuring synchronous counting and asynchronous presetting. The preset allows the FCT191T to be used in programmable dividers. The count enable input, terminal count output, and ripple clock output make possible a variety of methods of implementing multiusage counters. In the counting modes, state changes are initiated by the rising edge of the clock.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

• Sink current

64 mA

Source current

32 mA

Logic Block Diagram

 

 

 

Pin Configurations

 

 

 

 

 

 

CP U/D

P0

CE

P1

P2

P3

PL

 

 

 

 

 

 

 

 

 

 

SOIC/QSOP

 

 

 

 

 

 

 

 

 

Top View

 

 

 

 

 

 

 

P1

1

16

VCC

 

 

 

 

 

 

Q1

2

15

P0

 

 

 

 

 

 

Q0

3

14

CP

 

 

 

 

 

 

CE

4

13

RC

 

 

 

 

 

 

U/D

5

12

TC

 

 

 

 

 

 

Q2

6

11

PL

 

 

 

 

 

 

Q3

7

10

P2

 

 

 

 

 

 

GND

8

9

P3

J CLOCK K

J CLOCK K

J CLOCK K

J CLOCK K

PRESET

PRESET

PRESET

PRESET

 

CLEAR

 

CLEAR

 

CLEAR

 

CLEAR

Q

Q

Q

Q

Q

Q

Q

Q

 

 

 

Q1

 

 

RC TC

Q0

Q2

Q3

Pin Description

 

 

Name

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Count Enable Input (Active LOW)

 

CE

 

 

 

 

CP

Clock Pulse Input (Active Rising Edge)

 

 

 

 

P

Parallel Data Inputs

 

 

 

 

 

 

 

 

 

 

 

 

Asynchronous Parallel Load Input (Active LOW)

 

PL

 

 

 

 

 

 

 

 

 

 

 

Up/Down Count Control Input

 

U/D

 

 

 

 

Q

Flip-Flop Outputs

 

 

 

 

 

 

 

 

 

 

 

Ripple Clock Output (Active LOW)

 

RC

 

 

 

 

TC

Terminal Count Output

 

 

 

 

 

 

 

 

RC Function Table[1]

 

 

Inputs

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CP

T[2]

 

 

 

 

 

 

 

CE

RC

 

L

 

 

 

 

 

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

 

X

X

 

 

H

 

X

 

 

 

X

L

 

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Copyright © 2000, Texas Instruments Incorporated

CY74FCT191T

RC Function Table[1]

 

 

Inputs

 

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CP

T[2]

 

 

 

 

 

CE

RC

 

Notes:

1.H = HIGH Voltage Level, L = LOW Voltage Level, X = Don‘t Care,

 

 

 

= LOW-to-HIGH clock transition.

 

 

 

=Low Pulse.

2. TC is generated internally.

 

 

 

Mode Select[1]

 

 

 

 

Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CP

Mode

 

PL

CE

U/D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

L

 

L

 

 

 

 

 

 

Count Up

 

 

 

 

 

 

 

 

 

 

H

 

L

 

H

 

 

 

 

 

 

Count Down

 

 

 

 

 

 

 

 

 

 

L

 

X

 

X

 

 

X

Preset (Asynchronous)

 

H

 

H

 

X

 

 

X

No Change (Hold)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ambient Temperature with

–65°C to +135°C

Power Applied.............................................

Supply Voltage to Ground Potential...............

–0.5V to +7.0V

DC Input Voltage ...........................................

–0.5V to +7.0V

DC Output Voltage.........................................

–0.5V to +7.0V

DC Output Current (Maximum Sink Current/Pin) ......

120 mA

Power Dissipation ..........................................................

 

0.5W

Static Discharge Voltage............................................

 

>2001V

(per MIL-STD-883, Method 3015)

Operating Range

 

Ambient

 

Range

Temperature

VCC

Commercial

–40°C to +85°C

5V ± 5%

 

 

 

Maximum Ratings[3, 4]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................–65°C to +150°C

Electrical Characteristics Over the Operating Range

Parameter

Description

 

Test Conditions

Min.

Typ.[5]

Max.

Unit

VOH

Output HIGH Voltage

VCC=Min., IOH=–32 mA

2.0

 

 

V

 

 

 

VCC=Min., IOH=–15 mA

2.4

3.3

 

V

VOL

Output LOW Voltage

VCC=Min., IOL=64 mA

 

0.3

0.55

V

VIH

Input HIGH Voltage

 

 

2.0

 

 

V

VIL

Input LOW Voltage

 

 

 

 

0.8

V

VH

Hysteresis[6]

All inputs

 

0.2

 

V

VIK

Input Clamp Diode Voltage

VCC=Min., IIN=–18 mA

 

–0.7

–1.2

V

II

Input HIGH Current

VCC=Max., VIN=VCC

 

 

5

A

IIH

Input HIGH Current

VCC=Max., VIN=2.7V

 

 

±1

A

IIL

Input LOW Current

VCC=Max., VIN=0.5V

 

 

±1

A

I

OS

Output Short Circuit Current[7]

V

=Max., V =0.0V

–60

–120

–225

mA

 

 

CC

OUT

 

 

 

 

IOFF

Power-Off Disable

VCC=0V, VOUT=4.5V

 

 

±1

A

Capacitance[6]

Parameter

Description

Typ.[5]

Max.

Unit

CIN

Input Capacitance

5

10

pF

COUT

Output Capacitance

9

12

pF

Notes:

 

 

 

 

3.Unless otherwise noted, these limits are over the operating free-air temperature range.

4.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

5.Typical values are at VCC=5.0V, TA=+25˚C ambient.

6.This parameter is specified but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

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