Texas Instruments CD74HCT245M96, CD74HCT245M, CD74HCT245E, CD74HC245M96, CD74HC245M Datasheet

Data sheet acquired from Harris Semiconductor SCHS119

November 1997

CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

High Speed CMOS Logic Octal-Bus Transceiver,

Three-State, Non-Inverting

		Features
		•	Buffered Inputs
	[ /Title	•	Three-State Outputs
	(CD54	•	Bus Line Driving Capability
	HC245	•	Typical Propagation Delay (A to B, B to A) 9ns at VCC
	,
			= 5V, C	L	= 15pF, T = 25oC
	CD54				A
		•	Fanout (Over Temperature Range)
	HCT24
			- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
	5,		- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
	CD74	•	Wide Operating Temperature Range . . . -55oC to 125oC
	HC245	•	Balanced Propagation Delay and Transition Times
	,
		•	Significant Power Reduction Compared to LSTTL
	CD74
	HCT24		Logic ICs

5)• HC Types

	/Sub-	- 2V to 6V Operation
	ject	- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
	(High	at VCC = 5V
		• HCT Types
	Speed

-4.5V to 5.5V Operation

-Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

-CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Pinout

CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

	(CERDIP, PDIP, SOIC)
		TOP VIEW
DIR	1	20	VCC
A0	2	19	OE
A1	3	18	B0
A2	4	17	B1
A3	5	16	B2
A4	6	15	B3
A5	7	14	B4
A6	8	13	B5
A7	9	12	B6
GND	10	11	B7

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.	File Number 1651.1

Copyright © Harris Corporation 1997

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CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

Description

The Harris CD54HC245, CD54HCT245, and CD74HC245, CD74HCT245 are high-speed octal three-state bidirectional transceivers intended for two-way asynchronous communication between data buses. They have high drive current outputs which enable high-speed operation while driving large bus capacitances. They provide the low power consumption of standard CMOS circuits with speeds and drive capabilities comparable to that of LSTTL circuits.

The CD54HC245, CD54HCT245, CD74HC245 and CD74HCT245 allow data transmission of the B bus or from the B bus to the A bus. The logic level at the direction input (DIR) determines the direction. The output enable input (OE), when high, puts the I/O ports in the high-impedance state.

The HC/HCT245 is similar in operation to the HC/HCT640

and the HC/HCT643.

Ordering Information

	TEMP.		PKG.
PART NUMBER	RANGE (oC)	PACKAGE	NO.
CD54HC245F	-55 to 125	20 Ld CERDIP	F20.3
CD54HCT245F	-55 to 125	20 Ld CERDIP	F20.3
CD74HC245E	-55 to 125	20 Ld PDIP	E20.3
CD74HCT245E	-55 to 125	20 Ld PDIP	E20.3
CD74HC245M	-55 to 125	20 Ld SOIC	M20.3
CD74HCT245M	-55 to 125	20 Ld SOIC	M20.3
NOTES:

1.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

2.Wafer or die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.

Functional Diagram

	2	18
	A0	B0
	3	17
	A1	B1
	4	16
	A2	B2
	5	15
	A3	B3
	6	14
	A4	B4
	7	13
	A5	B5
	8	12
	A6	B6
	9	11
	A7	B7
	DIR	1
		19
	OE

				TRUTH TABLE
CONTROL INPUTS
			DIR		OPERATION
	OE
	L		L		B Data to A Bus
	L		H		A Data to B Bus
	H		X		Isolation

H = High Level, L = Low Level, X = Irrelevant

To prevent excess currents in the High-Z (Isolation) modes all I/O terminals should be terminated with 10kΩ to 1MΩ resistors.

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CD54HC245, CD54HCT245, CD74HC245, CD74HCT245

Absolute Maximum Ratings						Thermal Information
DC Supply Voltage, VCC		. .	. .	. . . . . . . . . . . . . . . . . . . .	-0.5V to 7V	Thermal Resistance (Typical, Note 3). . . . θJA (oC/W)		θJA (oC/W)
DC Input Diode Current, IIK					±20mA	PDIP Package . . . . . . . . . . . . . . . . . . .	125	N/A
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .						SOIC Package . . . . . . . . . . . . . . . . . . .	120	N/A
DC Output Diode Current, IOK						CERDIP Package . . . . . . . . . . . . . . . .	100	40
For V < -0.5V or V > V			CC	+ 0.5V . . . . . . . . . . . . . . . .	. . . .±20mA	Maximum Junction Temperature . . . . . . . . . . .	. . . . . . . .	. . . . 150oC
O	O						-65oC to 150oC
DC Drain Current, per Output, IO						Maximum Storage Temperature Range . . . . . .
For -0.5V < V < V	CC	+ 0.5V. . . . . . . . . . . . . . . . . . . . . .			. . . .±35mA	Maximum Lead Temperature (Soldering 10s) . .	. . . . . . .	. . . . 300oC
O
DC Output Source or Sink Current per Output Pin, IO					±25mA	(SOIC - Lead Tips Only)
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . .					. . . .±50mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

		TEST				25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS		VCC
PARAMETER	SYMBOL	VI (V)	IO (mA)	(V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HC TYPES
High Level Input	VIH	-	-	2	1.5	-	-	1.5	-	1.5	-	V
Voltage
				4.5	3.15	-	-	3.15	-	3.15	-	V
				6	4.2	-	-	4.2	-	4.2	-	V
Low Level Input	VIL	-	-	2	-	-	0.5	-	0.5	-	0.5	V
Voltage
				4.5	-	-	1.35	-	1.35	-	1.35	V
				6	-	-	1.8	-	1.8	-	1.8	V
High Level Output	VOH	VIH or VIL	-0.02	2	1.9	-	-	1.9	-	1.9	-	V
Voltage
			-0.02	4.5	4.4	-	-	4.4	-	4.4	-	V
CMOS Loads
			-0.02	6	5.9	-	-	5.9	-	5.9	-	V
High Level Output			-	-	-	-	-	-	-	-	-	V
Voltage
			-4	4.5	3.98	-	-	3.84	-	3.7	-	V
TTL Loads
			-5.2	6	5.48	-	-	5.34	-	5.2	-	V
Low Level Output	VOL	VIH or VIL	0.02	2	-	-	0.1	-	0.1	-	0.1	V
Voltage
			0.02	4.5	-	-	0.1	-	0.1	-	0.1	V
CMOS Loads
			0.02	6	-	-	0.1	-	0.1	-	0.1	V
Low Level Output			-	-	-	-	-	-	-	-	-	V
Voltage
			4	4.5	-	-	0.26	-	0.33	-	0.4	V
TTL Loads
			5.2	6	-	-	0.26	-	0.33	-	0.4	V
Input Leakage	II	VCC or	-	6	-	-	±0.1	-	±1	-	±1	μA
Current		GND

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