Texas Instruments CY74FCT163H245CPVC, CY74FCT163H245CPAC, CY74FCT163H245APVC, CY74FCT163245APVC, CY74FCT163245APAC Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modified to remove devices not offered.

CY74FCT163245

CY74FCT163H245

SCCS051 - February 1997 - Revised March 2000

16-Bit Transceivers

Features

•Low power, pin-compatible replacement for LCX and LPT families

•5V tolerant inputs and outputs

•24 mA balanced drive outputs

•Power-off disable outputs permits live insertion

•Edge-rate control circuitry for reduced noise

•FCT-C speed at 4.1 ns

•Latch-up performance exceeds JEDEC standard no. 17

•Typical output skew < 250ps

•Industrial temperature range of –40˚C to +85˚C

•TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)

•TypicalVolp (ground bounce) performance exceeds Mil Std 883D

•VCC = 2.7V to 3.6V

•ESD (HBM) > 2000V

CY74FCT163H245

•Bus hold on data inputs

•Eliminates the need for external pull-up or pull-down resistors

•Devices with bus hold are not recommended for translating rail-to-rail CMOS signals to 3.3V logic levels

Functional Description

These 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. Direction of data flow is controlled by (DIR), the Output Enable (OE) transfers data when LOW and isolates the buses when HIGH. The outputs are 24-mA balanced output drivers with current limiting resistors to reduce the need for external terminating resistors and provide for minimal undershoot and reduced ground bounce..

The CY74FCT163H245 has “bus hold” on the data inputs, which retains the input’s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.

The CY74FCT163245 is designed with inputs and outputs capable of being driven by 5.0V buses, allowing its use in mixed voltage systems as a translator. The outputs are also designed with a power off disable feature enabling its use in applications requiring live insertion.

Logic Block Diagrams CY74FCT163245, CY74FCT163H245

1DIR

1A1

1A2

1A3

1A4

1A5

1A6

1A7

1A8

	2DIR
1OE	2OE
	2A1
1B1	2B1
	2A2
1B2	2B2
	2A3
1B3	2B3
	2A4
1B4	2B4
	2A5
1B5	2B5
	2A6
1B6	2B6
	2A7
1B7	2B7
	2A8
1B8	2B8

Pin Configuration

SSOP/TSSOP

Top View

	1			48
1DIR						1OE
1B1	2			47		1A1
1B2	3			46		1A2
GND	4			45		GND
1B3	5			44		1A3
1B4	6			43		1A4
VCC	7		163245	42		VCC
1B5	8		163H245 41			1A5
1B6	9			40		1A6
GND	10			39		GND
1B7	11			38		1A7
1B8	12			37		1A8
2B1		13		36		2A1
2B2		14		35		2A2
GND		15		34		GND
2B3		16		33		2A3
		17		32
2B4						2A4
				31
VCC		18				VCC
2B5		19		30		2A5
2B6		20		29		2A6
GND		21		28		GND
2B7		22		27		2A7
2B8		23		26		2A8
2DIR						2
		24		25			OE

Copyright © 2000, Texas Instruments Incorporated

CY74FCT163245

CY74FCT163H245

Pin Description

	Name		Description
			Three-State Output Enable Inputs (Active LOW)
	OE
DIR			Direction Control
A			Inputs or Three-State Outputs[1]
B			Inputs or Three-State Outputs[1]

Function Table[2]

		Inputs
			DIR	Outputs
	OE
	L		L	Bus B Data to Bus A
	L		H	Bus A Data to Bus B
	H		X	High Z State

Maximum Ratings[3, 4]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–55°C to +125°C
Ambient Temperature with	–55°C to +125°C
Power Applied.............................................
Supply Voltage Range ........................................	0.5V to 4.6V
DC Input Voltage ...........................................	–0.5V to +7.0V
DC Output Voltage.........................................	–0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin) ........................	–60 to +120 mA
Power Dissipation ..........................................................	1.0W

Operating Range

	Ambient
Range	Temperature	VCC
Industrial	–40°C to +85°C	2.7V to 3.6V

Electrical Characteristics for Non Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V

	Parameter	Description			Test Conditions			Min.	Typ.[5]	Max.	Unit
VIH		Input HIGH Voltage	All Inputs					2.0		5.5	V
VIL		Input LOW Voltage								0.8	V
VH		Input Hysteresis[6]							100		mV
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=–18 mA						–0.7	–1.2	V
IIH		Input HIGH Current	VCC=Max., VI=5.5							±1	µA
IIL		Input LOW Current	VCC=Max., VI=GND							±1	µA
IOZH		High Impedance Output Current	VCC=Max., VOUT=5.5V							±1	µA
		(Three-State Output pins)
IOZL		High Impedance Output Current	VCC=Max., VOUT=GND							±1	µA
		(Three-State Output pins)
I	OS	Short Circuit Current[7]	V	CC	=Max., V	=GND		–60	–135	–240	mA
					OUT
IOFF		Power-Off Disable	VCC=0V, VOUT≤4.5V							±100	µA
ICC		Quiescent Power Supply Current	VIN≤0.2V,				VCC=Max.		0.1	10	µA
			VIN>VCC–0.2V
	ICC	Quiescent Power Supply Current	VIN=VCC–0.6V[8]				VCC=Max.		2.0	30	µA
		(TTL inputs HIGH)
Note:

1.On the CY74FCT163H245, these pins have bus hold.

2.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.

3.Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.

4.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

5.Typical values are at VCC=3.3V, TA = +25˚C ambient.

6.This parameter is specified but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

8.Per TTL driven input; all other inputs at VCC or GND.

2

CY74FCT163245

CY74FCT163H245

Electrical Characteristics For Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V

Parameter

Description

Test Conditions

Min.

Typ.[5]

Max.

Unit

VIH

Input HIGH Voltage

All Inputs

2.0

VCC

V

VIL

Input LOW Voltage

0.8

V

VH

Input Hysteresis[6]

100

mV

VIK

Input Clamp Diode Voltage

VCC=Min., IIN=–18 mA

–0.7

–1.2

V

IIH

Input HIGH Current

VCC=Max., VI=VCC

±100

µA

IIL

Input LOW Current

±100

µA

I

BBH

Bus Hold Sustain Current on Bus Hold Input[9]

V

=Min.

V

=2.0V

–50

µA

CC

I

IBBL

VI=0.8V

+50

µA

I

BHHO

Bus Hold Overdrive Current on Bus Hold Input[9]

V

=Max., V

I

=1.5V

±500

µA

CC

IBHLO

IOZH

High Impedance Output Current

VCC=Max., VOUT=VCC

±1

µA

(Three-State Output pins)

IOZL

High Impedance Output Current

VCC=Max., VOUT=GND

±1

µA

(Three-State Output pins)

I

OS

Short Circuit Current[7]

V

=Max., V

=GND

–60

–135

–240

mA

CC

OUT

IOFF

Power-Off Disable

VCC=0V, VOUT≤4.5V

±100

µA

ICC

Quiescent Power Supply Current

VIN≤0.2V,

V

=Max.

+40

µA

VIN>VCC–0.2V

CC

ICC

Quiescent Power supply Current

VIN=VCC–0.6V[8]

V

=Max.

+350

µA

(TTL inputs HIGH)

CC

Electrical Characteristics For Balanced Drive Devices Over the Operating Range VCC=2.7V to 3.6V

Parameter	Description	Test Conditions	Min.	Typ.[5]	Max.	Unit
IODL	Output LOW Dynamic Current[7]	VCC=3.3V, VIN=VIH	45		180	mA
		or VIL, VOUT=1.5V
IODH	Output HIGH Dynamic Current[7]	VCC=3.3V, VIN=VIH	–45		–180	mA
		or VIL, VOUT=1.5V
VOH	Output HIGH Voltage	VCC=Min., IOH= –0.1 mA	VCC–0.2			V
		VCC=Min., IOH= –8 mA	2.4[10]	3.0		V
		VCC=3.0V, IOH= –24 mA	2.0	3.0		V
VOL	Output LOW Voltage	VCC=Min., IOL= 0.1mA			0.2	V
		VCC=Min., IOL= 24 mA		0.3	0.55
Notes:

9.Pins with bus hold are described in Pin Description.

10. VOH=VCC–0.6V at rated current.

Capacitance[6](T = +25˚C, f = 1.0 MHz)
	A
Parameter	Description	Test Conditions	Typ.[5]	Max.	Unit
CIN	Input Capacitance	VIN = 0V	4.5	6.0	pF
COUT	Output Capacitance	VOUT = 0V	5.5	8.0	pF

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