Texas Instruments CY74FCT2543TQCT, CY74FCT2543TQC, CY74FCT2543CTSOCT, CY74FCT2543CTSOC, CY74FCT2543CTQCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.

SCCS042 - September 1994 - Revised March 2000

CY74FCT2543T

8-Bit Latched Transceiver

Features

•Function and pinout compatible with FCT and F logic

•FCT-C speed at 5.3 ns max. FCT-A speed at 6.5 ns max.

•25Ω output series resistors to reduce transmission line reflection noise

•Reduced VOH (typically = 3.3V) versions of equivalent FCT functions

•Edge-rate control circuitry for significantly improved noise characteristics

•Power-off disable feature

•Matched rise and fall times

•Fully compatible with TTL input and output logic levels

• Sink current	12 mA
Source current	15 mA

•Separation controls for data flow in each direction

•Back to back latches for storage

•ESD > 2000V

•Extended commercial temp. range of –40˚C to +85˚C

Functional Description

The FCT2543T Octal Latched Tranceiver contains two sets of eight D-type latches. Separate Latch Enable (LEAB, LEBA) and Output Enable (OEAB, OEBA) permits each latch set to have independent control of inputting and outputting in either direction of data flow. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be LOW to enter data from A or to take data from B, as indicated in the truth table. With CEAB LOW, a LOW signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their output no longer change with the A inputs. With CEAB and OEAB both LOW, the three-state B output buffers are active and reflect data present at the output of the A latches. Control of data from B to A is similar, but uses CEAB, LEAB, and OEAB inputs. On-chip termination resistors have been added to the outputs to reduce system noise caused by reflections. The FCT2543T can be used to replace the FCT543T to reduce noise in an existing design.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

Functional Block Diagram

Pin Configurations

		Detail A		SOIC/QSOP
D Q		B0
				Top View
LE
A0		Q D	LEBA	1	24	VCC
			OEBA	2	23	CEBA
		LE
			A0	3	22	B0
			A1	4	21	B1
A1		B1	A2	5	20	B2
A2		B2	A3	6	19	B3
A3		B3	A4	7	18	B4
A4	Detail A x 7	B4	A5	8	17	B5
A5		B5	A6	9	16	B6
A6		B6	A7	10	15	B7
			CEAB	11	14	LEAB
A7		B7
			GND	12	13	OEAB
OEBA
		OEAB				FCT2543T–3
CEBA
		CEAB
LEBA
		LEAB
		FCT2543T–1

Copyright © 2000, Texas Instruments Incorporated

CY74FCT2543T

Pin Description

		Name				Description
						A-to-B Output Enable Input (Active LOW)
		OEAB
						B-to-A Output Enable Input (Active LOW)
	OEBA
						A-to-B Enable Input (Active LOW)
	CEAB
						B-to-A Enable Input (Active LOW)
	CEBA
						A-to-B Latch Enable Input (Active LOW)
	LEAB
						B-to-A Latch Enable Input (Active LOW)
	LEBA
	A					A-to-B Data Inputs or B-to-A Three-State Outputs
	B					B-to-A Data Inputs or A-to-B Three-State Outputs

Maximum Ratings[4,5]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .....................................	−65°C to +150°C
Ambient Temperature with	−65°C to +135°C
Power Applied ..................................................
Supply Voltage to Ground Potential..................	−0.5V to +7.0V
DC Input Voltage .................................................	−0.5V to +7.0V
DC Output Voltage ..............................................	−0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......		120 mA
Power Dissipation ..........................................................		0.5W
Static Discharge Voltage............................................		>2001V
(per MIL-STD-883, Method 3015)

Function Table[1,2]

			Inputs						Latch	Outputs
									A-to-B[3]	B
	CEAB			LEAB			OEAB
	H			X			X		Storing	High Z
	X			H			X		Storing	X
	X			X			H		X	High Z
	L			L			L		Transparent	Current A Inputs
	L			H			L		Storing	Previous A Inputs

Electrical Characteristics Over the Operating Range

Operating Range

	Ambient
Range	Temperature	VCC
Commercial	−40°C to +85°C	5V ± 5%

Parameter		Description			Test Conditions	Min.	Typ.[7]	Max.	Unit
VOH		Output HIGH Voltage	VCC=Min., IOH=−15 mA			2.4	3.3		V
VOL		Output LOW Voltage	VCC=Min., IOL=12 mA				0.3	0.55	V
ROUT		Output Resistance	VCC=Min., IOL=12 mA			20	25	40	Ω
VIH		Input HIGH Voltage				2.0			V
VIL		Input LOW Voltage						0.8	V
VH		Hysteresis[8]	All inputs				0.2		V
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=−18 mA				−0.7	−1.2	V
IIH		Input HIGH Current	VCC=Max., VIN=VCC					5	µA
IIH		Input HIGH Current	VCC=Max., VIN=2.7V					±1	µA
IIL		Input LOW Current	VCC=Max., VIN=0.5V					±1	µA
IOZH		Off State HIGH-Level Output	VCC=Max., VOUT=2.7V					15	µA
		Current
IOZL		Off State LOW-Level	VCC=Max., VOUT=0.5V					−15	µA
		Output Current
I	OS	Output Short Circuit Current[9]	V	CC	=Max., V =0.0V	−60	−120	−225	mA
					OUT
IOFF		Power-Off Disable	VCC=0V, VOUT=4.5V					±1	µA

Notes:

1.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.

2.A-to-B data flow shown: B-to-A is the same, except using CEBA, LEBA, and OEBA.

3.Before LEAB LOW-to-HIGH transition.

4.Unless otherwise noted, these limits are over the operating free-air temperature range.

5.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

6.TA is the “instant on” case temperature.

2