Data sheet acquired from Harris Semiconductor SCHS169
November 1997
CD74HC251,
CD74HCT251
High Speed CMOS Logic
8-Input Multiplexer; Three-State
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Description |
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Selects One of Eight Binary Data Inputs |
The Harris CD74HC251 and CD74HCT251 are 8-channel |
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[ /Title |
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Three-State Output Capability |
digital multiplexers with three-state outputs, fabricated with |
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high-speed silicon-gate CMOS technology. Together with the |
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(CD74 |
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True and Complement Outputs |
low power consumption of standard CMOS integrated cir- |
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HC251 |
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Typical (Data to Output) Propagation Delay of 14ns at |
cuits, they possess the ability to drive 10 LSTTL loads. The |
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three-state feature makes them ideally suited for interfacing |
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CC |
= 5V, C |
L |
= 15pF, T = 25oC |
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with bus lines in a bus-oriented system. |
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CD74 |
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A |
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Fanout (Over Temperature Range) |
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HCT25 |
This multiplexer features both true (Y) and complement (Y) |
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- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads |
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outputs as well as an output enable (OE) input. The OE must |
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1) |
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Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads |
be at a low logic level to enable this device. When the |
OE |
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/Sub- |
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Wide Operating Temperature Range . . . -55oC to 125oC |
input is high, both outputs are in the high-impedance state. |
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When enabled, address information on the data select inputs |
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ject |
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• Balanced Propagation Delay and Transition Times |
determines which data input is routed to the Y and Y out- |
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(High |
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Significant Power Reduction Compared to LSTTL |
puts. The CD74HCT251 logic family is speed, function, and |
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Speed |
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pin-compatible with the standard 74LS251. |
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CMOS |
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Logic ICs |
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• Alternate Source is Philips |
Ordering Information |
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Logic |
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HC Types |
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8-Input |
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PKG. |
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Multi- |
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- 2V to 6V Operation |
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TEMP. RANGE (oC) |
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PART NUMBER |
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PACKAGE |
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NO. |
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plexer; |
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- High Noise Immunity: NIL = 30%, NIH = 30% of VCC |
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CD74HC251E |
-55 to 125 |
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16 Ld PDIP |
E16.3 |
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Three- |
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at VCC = 5V |
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• HCT Types |
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CD74HCT251E |
-55 to 125 |
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16 Ld PDIP |
E16.3 |
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4.5V to 5.5V Operation |
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CD74HC251M |
-55 to 125 |
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16 Ld SOIC |
M16.15 |
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- Direct LSTTL Input Logic Compatibility, |
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CD74HCT251M |
-55 to 125 |
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16 Ld SOIC |
M16.15 |
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VIL= 0.8V (Max), VIH = 2V (Min) |
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- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH |
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NOTES: |
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1. When ordering, use the entire part number. Add the suffix 96 to |
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obtain the variant in the tape and reel. |
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2. Wafer or die for this part number is available which meets all elec- |
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trical specifications. Please contact your local sales office or |
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Harris customer service for ordering information. |
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Pinout
CD74HC251, CD74HCT251
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(PDIP, SOIC) |
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TOP VIEW |
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I3 |
1 |
16 |
VCC |
I2 |
2 |
15 |
I4 |
I1 |
3 |
14 |
I5 |
I0 |
4 |
13 |
I6 |
Y |
5 |
12 |
I7 |
Y |
6 |
11 S0 |
OE |
7 |
10 |
S1 |
GND |
8 |
9 |
S2 |
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. |
File Number 1489.1 |
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Copyright © Harris Corporation 1997
1
CD74HC251, CD74HCT251
Functional Diagram
OE
7
4
I0
3
I1
2
I2
1
CHANNEL I3 INPUTS I4 15
14 |
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I5 |
5 |
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13 |
Y |
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I6 |
OUTPUTS |
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12 |
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6 |
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I7 |
Y |
11
S0
10
DATA S1
SELECT 9 S2
TRUTH TABLE
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INPUTS |
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OUTPUT |
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SELECT |
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OUTPUT |
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S2 |
S1 |
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S0 |
CONTROL |
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Y |
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OE |
Y |
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X |
X |
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X |
H |
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Z |
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Z |
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L |
L |
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L |
L |
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I0 |
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I0 |
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L |
L |
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H |
L |
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I1 |
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I1 |
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L |
H |
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L |
L |
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I2 |
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I2 |
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L |
H |
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H |
L |
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I3 |
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I3 |
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H |
L |
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L |
L |
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I4 |
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I4 |
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H |
L |
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H |
L |
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I5 |
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I5 |
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H |
H |
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L |
L |
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I6 |
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I6 |
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H |
H |
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H |
L |
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I7 |
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I7 |
NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, Z = High Impedance (Off), I0, I1...I7 = the level of the respective input.
2
CD74HC251, CD74HCT251
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . |
-0.5V to 7V |
DC Input Diode Current, IIK |
±20mA |
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . |
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DC Output Diode Current, IOK |
±20mA |
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . |
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DC Drain Current, per Output, IO |
±25mA |
For -0.5V < VO < VCC +0.5V . . . . . . . . . . . . . . . . . . . . . . |
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DC Output Source or Sink Current per Output Pin, IO |
±25mA |
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . |
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DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . |
. . . .±50mA |
Thermal Information |
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Thermal Resistance (Typical, Note 3) |
θJA (oC/W) |
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 90 |
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 160 |
Maximum Junction Temperature . . . . . . . . . . . . . . . . |
. . . . . . . 150oC |
Maximum Storage Temperature Range . . . . . . . . . . |
-65oC to 150oC |
Maximum Lead Temperature (Soldering 10s) . . . . . . |
. . . . . . . 300oC |
(SOIC - Lead Tips Only) |
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Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
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TEST |
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25oC |
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-40oC TO 85oC |
-55oC TO 125oC |
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CONDITIONS |
VCC |
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PARAMETER |
SYMBOL |
VI (V) |
IO (mA) |
(V) |
MIN |
TYP |
MAX |
MIN |
MAX |
MIN |
MAX |
UNITS |
HC TYPES |
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High Level Input |
VIH |
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2 |
1.5 |
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1.5 |
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1.5 |
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V |
Voltage |
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4.5 |
3.15 |
- |
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3.15 |
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3.15 |
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V |
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6 |
4.2 |
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4.2 |
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4.2 |
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V |
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Low Level Input |
VIL |
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2 |
- |
- |
0.5 |
- |
0.5 |
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0.5 |
V |
Voltage |
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4.5 |
- |
- |
1.35 |
- |
1.35 |
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1.35 |
V |
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6 |
- |
- |
1.8 |
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1.8 |
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1.8 |
V |
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High Level Output |
VOH |
VIH or VIL |
-0.02 |
2 |
1.9 |
- |
- |
1.9 |
- |
1.9 |
- |
V |
Voltage |
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-0.02 |
4.5 |
4.4 |
- |
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4.4 |
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4.4 |
- |
V |
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CMOS Loads |
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-0.02 |
6 |
5.9 |
- |
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5.9 |
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5.9 |
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V |
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High Level Output |
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- |
- |
- |
- |
- |
- |
- |
- |
- |
V |
Voltage |
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-4 |
4.5 |
3.98 |
- |
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3.84 |
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3.7 |
- |
V |
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TTL Loads |
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-5.2 |
6 |
5.48 |
- |
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5.34 |
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5.2 |
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V |
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Low Level Output |
VOL |
VIH or VIL |
0.02 |
2 |
- |
- |
0.1 |
- |
0.1 |
- |
0.1 |
V |
Voltage |
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0.02 |
4.5 |
- |
- |
0.1 |
- |
0.1 |
- |
0.1 |
V |
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CMOS Loads |
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0.02 |
6 |
- |
- |
0.1 |
- |
0.1 |
- |
0.1 |
V |
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Low Level Output |
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- |
- |
- |
- |
- |
- |
- |
- |
- |
V |
Voltage |
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4 |
4.5 |
- |
- |
0.26 |
- |
0.33 |
- |
0.4 |
V |
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TTL Loads |
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5.2 |
6 |
- |
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0.26 |
- |
0.33 |
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0.4 |
V |
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3