Texas Instruments CY74FCT377TQCT, CY74FCT377TQC, CY74FCT377CTSOCT, CY74FCT377CTSOC, CY74FCT377CTQCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modified to remove devices not offered.

		CY54/74FCT377T
		8-Bit Register
SCCS023 - May1994 - Revised March 2000
Features		• Clock Enable for address and data synchronization
		application

•Function, pinout and drive compatible with FCT and F logic

•FCT-C speed at 5.2 ns max. (Com’l) FCT-A speed at 7.2 ns max. (Com’l)

•Reduced VOH (typically = 3.3V) versions of equivalent FCT functions

•Edge-rate control circuitry for significantly improved noise characteristics

•Power-off disable feature

•Matched rise and fall times

•ESD > 2000V

•Fully compatible with TTL input and output logic levels

• Sink Current	64 mA (Com’l),
	32 mA (Mil)
Source Current	32 mA (Com’l),
	12 mA (Mil)

•Eight edge-triggered D flip-flops

•Extended commercial range of −40˚C to +85˚C

Functional Description

The FCT377T has eight triggered D-type flip-flops with individual D inputs. The common buffered clock inputs (CP) loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s O output. The CE input must be stable only one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

Logic Block Diagram

D0

D1

D2

D3

D4

D5

D6

D7

CE

D Q

D Q

D Q

D Q

D Q

D Q

D Q

D Q

CP

CP

CP

CP

CP

CP

CP

CP

CP

O0

O1

O2

O3

O4

O5

O6

O7

Pin Configurations

Logic Symbol

SOIC/QSOP

LCC

Top View

Top View

CE

1

20

VCC

3

2

2 1

1

O0

2

19

O7

D

D

O O

D

8 7 6 5 4

D0

3

18

D7

D0

D1

D2

D3

D4

D5

D6

D7

O3

D0

D1

4

17

D6

9

3

CP

GND

O

O1

5

16

O6

10

2

0

CP

11

1

CE

O2

6

15

O5

CE

O4 12

20

VCC

D2

7

14

D5

O0

O1

O2

O3

O4

O5

O6

O7

D4

13

19

O7

D3

8

13

D4

14

1516

17 18

O3

9

12

O4

5

5

6

6

7

GND

10

11

CP

D

O

O

D

D

Copyright © 2000, Texas Instruments Incorporated

CY54/74FCT377T

Function Table[1]

Operating			Inputs		Outputs
Mode	CP		CE	D	O
Load “1”			l	h	H
Load “0“			l	l	L
Hold			h	X	No Change
	X		H	X	No Change

Supply Voltage to Ground Potential...............	–0.5V to +7.0V
DC Input Voltage ...........................................	–0.5V to +7.0V
DC Output Voltage.........................................	–0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......		120 mA
Power Dissipation ..........................................................		0.5W
Static Discharge Voltage............................................		>2001V
(per MIL-STD-883, Method 3015)

Maximum Ratings[2, 3]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–65°C to +150°C
Ambient Temperature	–65°C to +135°C
with Power Applied......................................

Operating Range

		Ambient
Range	Range	Temperature	VCC
Commercial	All	–40°C to +85°C	5V ± 5%
Military[4]	All	–55°C to +125°C	5V ± 10%

Electrical Characteristics Over the Operating Range

Parameter		Description		Test Conditions		Min.	Typ.[5]	Max.	Unit
VOH		Output HIGH Voltage	VCC=Min., IOH=–32 mA		Com’l	2.0			V
			VCC=Min., IOH=–15 mA		Com’l	2.4	3.3		V
			VCC=Min., IOH=–12 mA		Mil	2.4	3.3		V
VOL		Output LOW Voltage	VCC=Min., IOL=64 mA		Com’l		0.3	0.55	V
			VCC=Min., IOL=32 mA		Mil		0.3	0.55	V
VIH		Input HIGH Voltage				2.0			V
VIL		Input LOW Voltage						0.8	V
VH		Hysteresis[6]	All inputs				0.2		V
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=–18 mA				–0.7	–1.2	V
II		Input HIGH Current	VCC=Max., VIN=VCC					5	A
IIH		Input HIGH Current	VCC=Max., VIN=2.7V					±1	A
IIL		Input LOW Current	VCC=Max., VIN=0.5V					±1	A
I	OS	Output Short Circuit Current[7]	V	=Max., V =0.0V		–60	–120	–225	mA
			CC	OUT
IOFF		Power-Off Disable	VCC=0V., VOUT=4.5V					±1	A

Notes:

1.H = HIGH Voltage Level

h = HIGH Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition L = LOW Voltage Level

l = LOW Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition X = Don’t Care

Z = HIGH Impedance

= LOW-to-HIGH clock transition

2.Unless otherwise noted, these limits are over the operating free-air temperature range.

3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

4.TA is the “instant on” case temperature.

5.Typical values are at VCC=5.0V, TA=+25˚C ambient.

6.This parameter is specified but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

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CY54/74FCT377T

Capacitance[2]

Parameter		Description	Typ.[5]	Max.	Unit
CIN	Input Capacitance		5	10	pF
COUT	Output Capacitance		9	12	pF

Power Supply Characteristics

Parameter

Description

Test Conditions

Typ.[5]

Max.

Unit

ICC

Quiescent Power Supply Current

VCC=Max., VIN≤0.2V, VIN ≥ VCC–0.2V

0.1

0.2

mA

I

CC

Quiescent Power Supply Current

V

=Max., V

=3.4V, f

=0, Outputs Open[8]

0.5

2.0

mA

(TTL inputs HIGH)

CC

IN

1

I

CCD

Dynamic Power Supply Current[9]

V

=Max., One Bit Toggling,

0.06

0.12

mA/MHz

CC

50% Duty Cycle, Outputs Open,

CE=GND, VIN ≤ 0.2V or VIN ≥ VCC–0.2V

I

C

Total Power Supply Current[10]

V

=Max., f

=10 MHz,

0.7

1.4

mA

CC

0

50% Duty Cycle, Outputs Open,

One Bit Toggling at f1=5 MHz,

CE=GND, VIN≤0.2V or VIN ≥ VCC–0.2V

VCC=Max., f0=10 MHz,

1.2

3.4

mA

50% Duty Cycle, Outputs Open,

One Bit Toggling at f1=5 MHz,

CE=GND,

VIN=3.4V or VIN=GND

VCC=Max., f0=10 MHz,

1.6

3.2[11]

mA

50% Duty Cycle, Outputs Open,

Eight Bits Toggling at f1=2.5 MHz,

CE=GND, VIN≤0.2V or VIN≥VCC–0.2V

V

=Max., f

=10 MHz,

3.9

12.2[11]

mA

CC

0

50% Duty Cycle, Outputs Open,

Eight Bits Toggling at f1=2.5 MHz,

CE=GND, VIN=3.4V or VIN=GND

Notes:

8.Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.

9.This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

10. IC	= IQUIESCENT + IINPUTS + IDYNAMIC
IC	=	ICC+ ICCDHNT+ICCD(f0/2 + f1N1)
ICC	= Quiescent Current with CMOS input levels
ICC	= Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH	= Duty Cycle for TTL inputs HIGH
NT	= Number of TTL inputs at DH
ICCD	= Dynamic Current caused by an input transition pair (HLH or LHL)
f0	= Clock frequency for registered devices, otherwise zero
f1	=	Input signal frequency
N1	= Number of inputs changing at f1

All currents are in milliamps and all frequencies are in megahertz.

11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

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