Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT16373T
CY74FCT162373T
SCCS054 - August 1994 - Revised March 2000
16-Bit Latches
Features
•FCT-E speed at 3.4 ns
•Power-off disable outputs permits live insertion
•Edge-rate control circuitry for significantly improved noise characteristics
•Typical output skew < 250 ps
•ESD > 2000V
•TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
•Industrial temperature range of−40˚C to +85˚C
•VCC = 5V ± 10%
CY74FCT16373T Features: |
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• 64 mA sink current, 32 mA source current |
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• Typical V |
(ground bounce) <1.0V at V |
CC |
= 5V, |
OLP |
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TA = 25˚C
CY74FCT162373T Features:
•Balanced 24 mA output drivers
•Reduced system switching noise
• Typical V |
(ground bounce) <0.6V at V |
CC |
= 5V, |
OLP |
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TA= 25˚C |
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Functional Description
CY74FCT16373T and CY74FCT162373T are 16-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 8-bit latches or as a single 16-bit latch by connecting the Output Enable (OE) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout. The output buffers are designed with power-off disable feature that allows live insertion of boards.
The CY74FCT16373T is ideally suited for driving high-capacitance loads and low-impedance backplanes.
The CY74FCT162373T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162373T is ideal for driving transmission lines.
Logic Block Diagrams |
Pin Configuration |
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SSOP/TSSOP |
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1 |
OE |
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Top View |
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1 |
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1 |
48 |
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1LE |
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1LE |
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OE |
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1O1 |
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47 |
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1D1 |
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1D1 |
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D |
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1O2 |
3 |
46 |
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1D2 |
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1O1 |
GND |
4 |
45 |
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GND |
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C |
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1O3 |
5 |
44 |
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1D3 |
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1O4 |
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43 |
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1D4 |
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VCC |
7 |
42 |
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VCC |
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1O5 |
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41 |
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1D5 |
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TO 7 OTHER CHANNELS |
1O6 |
9 |
40 |
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1D6 |
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GND |
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GND |
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FCT162373-1 |
1O7 |
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38 |
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1D7 |
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1O8 |
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1D8 |
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2 |
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OE |
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2O1 |
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36 |
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2D1 |
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2O2 |
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14 |
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2D2 |
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2LE |
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GND |
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15 |
34 |
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GND |
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2O3 |
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33 |
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2D3 |
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2D1 |
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D |
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2O1 |
2O4 |
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2D4 |
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18 |
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C |
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VCC |
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VCC |
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2O5 |
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30 |
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2D5 |
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2O6 |
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29 |
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2D6 |
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GND |
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28 |
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GND |
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TO 7 OTHER CHANNELS |
2O7 |
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27 |
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2D7 |
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2O8 |
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26 |
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2D8 |
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2 |
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2LE |
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FCT162373-2 |
OE |
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24 |
25 |
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FCT162373-3 |
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Copyright © 2000, Texas Instruments Incorporated
CY74FCT16373T
CY74FCT162373T
Pin Description
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Name |
Description |
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D |
Data Inputs |
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LE |
Latch Enable Inputs (Active HIGH) |
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Output Enable Inputs (Active LOW) |
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OE |
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O |
Three-State Outputs |
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Function Table[1]
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Inputs |
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Outputs |
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D |
LE |
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O |
OE |
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H |
H |
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L |
H |
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L |
H |
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L |
L |
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X |
L |
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L |
Q0 |
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X |
X |
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H |
Z |
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Electrical Characteristics Over the Operating Range
Maximum Ratings[2, 3]
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ...................... |
Com’l |
−55°C to +125°C |
Ambient Temperature with |
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−55°C to +125°C |
Power Applied................................. |
Com’l |
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DC Input Voltage ................................................. |
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−0.5V to +7.0V |
DC Output Voltage .............................................. |
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−0.5V to +7.0V |
DC Output Current |
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−60 to +120 mA |
(Maximum Sink Current/Pin) ........................... |
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Power Dissipation .......................................................... |
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1.0W |
Static Discharge Voltage............................................ |
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>2001V |
(per MIL-STD-883, Method 3015)
Operating Range
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Ambient |
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Range |
Temperature |
VCC |
Industrial |
−40°C to +85°C |
5V ± 10% |
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Parameter |
Description |
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Test Conditions |
Min. |
Typ.[4] |
Max. |
Unit |
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VIH |
Input HIGH Voltage |
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2.0 |
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V |
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VIL |
Input LOW Voltage |
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0.8 |
V |
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VH |
Input Hysteresis[5] |
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100 |
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mV |
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VIK |
Input Clamp Diode Voltage |
VCC=Min., IIN=−18 mA |
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−0.7 |
−1.2 |
V |
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IIH |
Input HIGH Current |
VCC=Max., VI=VCC |
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±1 |
µA |
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IIL |
Input LOW Current |
VCC=Max., VI=GND |
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±1 |
µA |
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IOZH |
High Impedance Output Current |
VCC=Max., VOUT=2.7V |
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±1 |
µA |
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(Three-State Output pins) |
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IOZL |
High Impedance Output Current |
VCC=Max., VOUT=0.5V |
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±1 |
µA |
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(Three-State Output pins) |
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I |
OS |
Short Circuit Current[6] |
V |
CC |
=Max., V |
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=GND |
−80 |
−140 |
−200 |
mA |
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OUT |
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I |
O |
Output Drive Current[6] |
V |
CC |
=Max., V |
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=2.5V |
−50 |
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−180 |
mA |
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OUT |
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I |
OFF |
Power-Off Disable |
V |
CC |
=0V, V |
≤4.5V[7] |
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±1 |
µA |
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OUT |
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Output Drive Characteristics for CY74FCT16373T
Parameter |
Description |
Test Conditions |
Min. |
Typ.[4] |
Max. |
Unit |
VOH |
Output HIGH Voltage |
VCC=Min., IOH=−3 mA |
2.5 |
3.5 |
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V |
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VCC=Min., IOH=−15 mA |
2.4 |
3.5 |
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V |
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VCC=Min., IOH=−32 mA |
2.0 |
3.0 |
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V |
VOL |
Output LOW Voltage |
VCC=Min., IOL=64 mA |
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0.2 |
0.55 |
V |
Notes: |
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1.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. Q0=Previous state of flip-flop.
2.Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4.Typical values are at VCC=5.0V, TA= +25˚C ambient.
5.This parameter is specified but not tested.
6.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.
7.Tested at +25˚C.
2
CY74FCT16373T
CY74FCT162373T
Output Drive Characteristics for CY74FCT162373T
Parameter |
Description |
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Test Conditions |
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Min. |
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Typ.[4] |
Max. |
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I |
ODL |
Output LOW Current[6] |
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V |
CC |
=5V, V |
IN |
=V |
IH |
or V |
IL |
, V |
=1.5V |
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60 |
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115 |
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150 |
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mA |
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OUT |
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I |
ODH |
Output HIGH Current[6] |
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V |
CC |
=5V, V |
IN |
=V |
IH |
or V |
IL |
, V |
=1.5V |
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−60 |
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−115 |
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−150 |
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mA |
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OUT |
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VOH |
Output HIGH Voltage |
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VCC=Min., IOH=−24 mA |
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2.4 |
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3.3 |
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V |
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VOL |
Output LOW Voltage |
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VCC=Min., IOL=24 mA |
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0.3 |
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0.55 |
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V |
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Capacitance[5] (T = +25˚C, f = 1.0 MHz) |
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A |
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Parameter |
Description |
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Test Conditions |
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Typ.[4] |
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Max. |
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Unit |
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CIN |
Input Capacitance |
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VIN = 0V |
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4.5 |
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6.0 |
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pF |
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COUT |
Output Capacitance |
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VOUT = 0V |
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5.5 |
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8.0 |
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pF |
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Power Supply Characteristics |
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Parameter |
Description |
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Test Conditions |
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Typ.[4] |
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Max. |
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Unit |
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ICC |
Quiescent Power Supply Current |
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VCC=Max. |
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VIN≤0.2V, |
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5 |
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500 |
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VIN≥VCC−0.2V |
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ICC |
Quiescent Power Supply Current |
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VCC=Max. |
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VIN=3.4V[8] |
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0.5 |
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1.5 |
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mA |
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(TTL inputs HIGH) |
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ICCD |
Dynamic Power Supply |
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VCC=Max., One Input |
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VIN=VCC or |
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60 |
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100 |
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µA/MHz |
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Current[9] |
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Toggling, 50% Duty Cycle, |
VIN=GND |
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Outputs Open, OE=GND |
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IC |
Total Power Supply Current[10] |
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VCC=Max., f1=10 MHz, |
VIN=VCC or |
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0.6 |
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1.5 |
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mA |
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50% Duty Cycle, Outputs |
VIN=GND |
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Open, One Bit Toggling, |
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0.9 |
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2.3 |
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mA |
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OE=GND, LE=VCC |
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VIN=GND |
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VCC=Max., f1=2.5 MHz, |
VIN=VCC or |
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2.4 |
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4.5[11] |
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mA |
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50% Duty Cycle, Outputs |
VIN=GND |
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Open, Sixteen Bits Toggling, |
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VIN=3.4V or |
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6.4 |
16.5[11] |
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mA |
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OE=GND, LE=VCC |
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VIN=GND |
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Notes: |
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8.Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9.This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC= |
IQUIESCENT + IINPUTS + IDYNAMIC |
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IC |
= |
ICC+ ICCDHNT+ICCD(f0/2 + f1N1) |
ICC |
= Quiescent Current with CMOS input levels |
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ICC |
= Power Supply Current for a TTL HIGH input(VIN=3.4V) |
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DH |
= Duty Cycle for TTL inputs HIGH |
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NT |
= Number of TTL inputs at DH |
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ICCD |
= Dynamic Current caused by an input transition pair (HLH or LHL) |
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f0 |
= Clock frequency for registered devices, otherwise zero |
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f1 |
= |
Input signal frequency |
= Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
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