Texas Instruments CD74HCT243M, CD74HCT243E, CD74HC243M96, CD54HCT243F3A, CD54HC243F3A Datasheet

CD74HCT242 was not acquired from Harris Semiconductor.

CD74HCT242, CD74HC243,

CD74HCT243

Data sheet acquired from Harris Semiconductor SCHS168

November 1997

High Speed CMOS Logic Quad-Bus Transceiver with Three-State Outputs

[ /Title (CD74 HCT24 2, CD74 HC243

,

CD74

HCT24

3) /Subject (High Speed CMOS Logic Quad-

Features

•Typical Propagation Delay (A to B, B to A) of 7ns at VCC = 5V, CL = 15pF, TA = 25oC

•Three-State Outputs

•Buffered Inputs

•Fanout (Over Temperature Range)

-Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

-Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

•Wide Operating Temperature Range . . . -55oC to 125oC

•Balanced Propagation Delay and Transition Times

•Significant Power Reduction Compared to LSTTL Logic ICs

•HC Types

-2V to 6V Operation

-High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

•HCT Types

-4.5V to 5.5V Operation

-Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

-CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Pinout

CD74HCT242, CD74HC243, CD74HCT243

(PDIP, SOIC)

TOP VIEW

OEB		1		14	VCC
NC					OEA
		2		13
A0					NC
		3		12
A1					B0
		4		11
A2					B1
		5		10
A3					B2
		6		9
GND					B3
		7		8

Description

The Harris CD74HCT242, CD74HC243 and CD74HCT243 silicon-gate CMOS three-state bidirectional inverting and non-inverting buffers are intended for two-way asynchronous communication between data buses. They have high drive current outputs which enable high-speed operation when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuits, and have speeds comparable to low power Schottky TTL circuits. They can drive 15 LSTTL loads.

The CD74HCT242 is an inverting buffer; the CD74HC243 and CD74HCT243 are non-inverting buffers.

The states of the output enables (OEB, OEA) determine both the direction of flow (A to B, B to A), and the three-state mode.

Ordering Information

	TEMP. RANGE		PKG.
PART NUMBER	(oC)	PACKAGE	NO.
CD74HC243E	-55 to 125	14 Ld PDIP	E14.3
CD74HC243M	-55 to 125	14 Ld SOIC	M14.15
CD74HCT243M	-55 to 125	14 Ld SOIC	M14.15
NOTES:

1.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

2.Wafer or die for this part number is available which meets all electrical specifications. Please contact your local sales

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.		File Number 1488.1
Copyright © Harris Corporation 1997	1

CD74HCT242, CD74HC243, CD74HCT243

Functional Diagrams

			CD74HCT242
	A0	3	11B0
	A1	4	10
			B1
	A2	5	9
			B2
	A3	6	8
			B3
	OEB	1
			DIRECTION
	13
			SELECT LOGIC
	OEA

			CD74HC243, CD74HC243
	A0	3	11 B0
	A1	4	10
			B1
	A2	5	9
			B2
	A3	6	8
			B3
	OEB	1
			DIRECTION
		13
	OEA		SELECT LOGIC

TRUTH TABLE

HCT242 SERIES

HC, HCT243 SERIES

CONTROL INPUTS

DATA PORT STATUS

DATA PORT STATUS

OEA

An

Bn

An

Bn

OEB

H

H

I

O

I

O

L

H

Z

Z

Z

Z

H

L

Z

Z

Z

Z

L

L

I

I

O

O

NOTE:

H= High Voltage Level

L= Low Voltage Level

I= Input

O = Output (Same Level as Input) O = Output (Inversion of Input Level) Z = High Impedance

To prevent excess currents in the High Z modes all I/O terminals should be terminated with 10kΩ to 1MΩ resistors.

2

CD74HCT242, CD74HC243, CD74HCT243

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .	-0.5V to 7V
DC Input Diode Current, IIK	±20mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .
DC Output Diode Current, IOK	±20mA
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .
DC Drain Current, per Output, IO	±35mA
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .
DC Output Source or Sink Current per Output Pin, IO	±25mA
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . .	. . . .±70mA

Thermal Information
Thermal Resistance (Typical, Note 3)	θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 175
Maximum Junction Temperature . . . . . . . . . . . . . . . .	. . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .	-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . .	. . . . . . . 300oC
(SOIC - Lead Tips Only)

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

		TEST				25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS
PARAMETER	SYMBOL	VI (V)	IO (mA)	VCC (V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HC TYPES
High Level Input	VIH	-	-	2	1.5	-	-	1.5	-	1.5	-	V
Voltage
				4.5	3.15	-	-	3.15	-	3.15	-	V
				6	4.2	-	-	4.2	-	4.2	-	V
Low Level Input	VIL	-	-	2	-	-	0.5	-	0.5	-	0.5	V
Voltage
				4.5	-	-	1.35	-	1.35	-	1.35	V
				6	-	-	1.8	-	1.8	-	1.8	V
High Level Output	VOH	VIH or	-0.02	2	1.9	-	-	1.9	-	1.9	-	V
Voltage		VIL
			-0.02	4.5	4.4	-	-	4.4	-	4.4	-	V
CMOS Loads
			-0.02	6	5.9	-	-	5.9	-	5.9	-	V
High Level Output			-6	4.5	3.98	-	-	3.84	-	3.7	-	V
Voltage
			-7.8	6	5.48	-	-	5.34	-	5.2	-	V
TTL Loads
Low Level Output	VOL	VIH or	0.02	2	-	-	0.1	-	0.1	-	0.1	V
Voltage		VIL
			0.02	4.5	-	-	0.1	-	0.1	-	0.1	V
CMOS Loads
			0.02	6	-	-	0.1	-	0.1	-	0.1	V
Low Level Output			6	4.5	-	-	0.26	-	0.33	-	0.4	V
Voltage
			7.8	6	-	-	0.26	-	0.33	-	0.4	V
TTL Loads

3