Texas Instruments CY29FCT520ATSOC, CY29FCT520ATPC, CY29FCT520CTSOCT, CY29FCT520CTSOC, CY29FCT520BTSOCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modified to remove devices not offered.

CY29FCT520T

SCCS011A - May 1994 - Revised April 2000

Features

•Function, pinout, and drive compatible with FCT, F Logic, and AM29520

•FCT-C speed at 6.0 ns max. (Com’l), FCT-B speed at 7.5 ns max. (Com’l), FCT-A speed at 14.0 ns max. (Com’l)

•Reduced VOH (typically = 3.3V) versions of equivalent FCT functions

•Edge-rate control circuitry for significantly improved noise characteristics

•Power-Off disable feature

•Matched rise and fall times

•Fully compatible with TTL input and output logic levels

•ESD > 2000V

• Sink current	64 mA (Com’l), 32 mA (Mil)
Source current	32 mA (Com’l), 12 mA (Mil)

•Single and dual pipeline operation modes

•Multiplexed data inputs and outputs

Multi-Level Pipeline Register

Functional Description

The CY29FCT520T devices are multilevel 8-bit-wide pipeline registers. The devices consist of four registers, A1, A2, B1, and B2, which are configured by the instruction inputs I0, I1 as a single 4-level pipeline or as two two-level pipelines. The contents of any register may be read at the multiplexed output at any time by using the mux-selection controls S0 and S1.

The pipeline registers are positive edge triggered and data is shifted by the rising edge of the clock input. Instruction I=0 selects the four-level pipeline mode. Instruction I=1 selects the two-level B pipeline while I=2 selects the two-level A pipeline. I=3 is the HOLD instruction; no shifting is performed by the clock in this mode.

In the two-level operation mode, data is shifted from level 1 to level 2 and new data is loaded into level 1.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

	Logic Block Diagram		–D 7	Pin	Configurations
		D0
		8
				DIP, SOIC, QSOP, CDIP
	INSTRUCTION				Top View
	I0	REGISTER	MUX		1	24
	I1			I0			VCC
		CONTROLS			2	23
	CLOCK			I1			S0
				D0	3	22	S1
					4
		OCTAL REG	OCTAL REG	D1		21	Y0
					5	20
		A1	B1	D2			Y1
				D3	6	19	Y2
				D4	7	18	Y
							3
	MUX S0	OCTAL REG	OCTAL REG	D5	8	17	Y4
	SEL S1	A2	B2	D6	9	16	Y5
				D7	10	15	Y6
				CLK	11	14	Y7
		MUX		GND	12	13	OE

OE

8

Y0–Y 7

Pipeline Instruction Table

I = 0

I = 1

I = 2

I = 3

I1 = 0

I0 = 0

I1 = 0

I0 = 1

I1 = 1 I0 = 0

I1 = 1

I0 = 1

A1

B1

A1

B1

A1

B1

A1

B1

A2

B2

A2

B2

A2

B2

A2

B2

Single four-level

Dual two-level

Hold

Copyright © 2000, Texas Instruments Incorporated

Output Selection Mux Table

Inputs.
S1	S0	Output
1	1	A1
1	0	A2
0	1	B1
0	0	B2

CY29FCT520T

Supply Voltage to Ground Potential...............	–0.5V to +7.0V
DC Input Voltage ...........................................	–0.5V to +7.0V
DC Output Voltage.........................................	–0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......		120 mA
Power Dissipation ..........................................................		0.5W
Static Discharge Voltage............................................		>2001V
(per MIL-STD-883, Method 3015)

Maximum Ratings[1, 2]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–65°C to +150°C
Ambient Temperature with	–65°C to +135°C
Power Applied .............................................

Operating Range

	Ambient
Range	Temperature[3]	VCC
Commercial	–40°C to +85°C	5V ± 5%
Military	–55°C to +125°C	5V ± 10%

Electrical Characteristics Over the Operating Range

Parameter		Description			Test Conditions			Min.	Typ.[4]	Max.	Unit
VOH		Output HIGH Voltage	VCC=Min., IOH=–32 mA				Com’l	2.0			V
			VCC=Min., IOH=–15 mA				Com’l	2.4	3.3		V
			VCC=Min., IOH=–12 mA				Mil	2.4	3.3		V
VOL		Output LOW Voltage	VCC=Min., IOL=64 mA				Com’l		0.3	0.55	V
			VCC=Min., IOL=32 mA				Mil		0.3	0.55	V
VIH		Input HIGH Voltage						2.0			V
VIL		Input LOW Voltage								0.8	V
VH		Hysteresis[5]	All inputs						0.2		V
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=–18 mA						–0.7	–1.2	V
II		Input HIGH Current	VCC=Max., VIN=VCC							5	A
IIH		Input HIGH Current	VCC=Max., VIN=2.7V							±1	A
IIL		Input LOW Current	VCC=Max., VIN=0.5V							±1	A
IOZH		Off State HIGH-Level Output Current	VCC=Max., VOUT=2.7V							10	A
IOZL		Off State LOW-Level	VCC=Max., VOUT = 0.5V							–10	A
		Output Current
I	OS	Output Short Circuit Current[6]	V	CC	=Max., V =0.0V			–60	–120	–225	mA
					OUT
IOFF		Power-Off Disable	VCC=0V, VOUT=4.5V							±1	A

Capacitance[5]

Parameter	Description	Test Conditions	Typ.[4]	Max.	Unit
CIN	Input Capacitance		5	10	pF
COUT	Output Capacitance		9	12	pF
Notes:

1.Unless otherwise noted, these limits are over the operating free-air temperature range.

2.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

3.TA is the “instant on” case temperature.

4.Typical values are at VCC=5.0V, TA=+25˚C ambient.

5.This parameter is specified but not tested.

6.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

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CY29FCT520T

Power Supply Characteristics

Parameter	Description	Test Conditions	Typ.[4]	Max.	Unit
ICC	Quiescent Power Supply Current	VCC=Max., VIN<0.2V, VIN>VCC–0.2V	0.1	0.2	mA
ICC	Quiescent Power Supply Current	VCC=Max., VIN=3.4V, f1=0, Outputs Open [7]	0.5	2.0	mA
	(TTL inputs HIGH)
ICCD	Dynamic Power Supply Current[8]	VCC=Max., One Input Toggling, 50% Duty Cycle,	0.06	0.12	mA/MHz
		Outputs Open, OE=GND,
		VIN<0.2V or VIN>VCC–0.2V
IC	Total Power Supply Current[9]	VCC=Max., 50% Duty Cycle, Outputs Open,	0.7	1.4	mA
		f0=10 MHz, One Bit Toggling at f1=5 MHz,
		OE=GND, VIN<0.2V or VIN>VCC–0.2V
		VCC=Max., 50% Duty Cycle, Outputs Open,	1.2	3.4	mA
		f0=10 MHz, One Bit Toggling at f1=5 MHz,
		OE=GND, VIN=3.4V or VIN=GND
		VCC=Max., 50% Duty Cycle, Outputs Open,	2.8	5.6[10]	mA
		f0=10 MHz, Eight Bits Toggling at f1=5 MHz,
		OE=GND, VIN<0.2V or VIN>VCC–0.2V
		VCC=Max., 50% Duty Cycle, Outputs Open,	5.1	14.3[10]	mA
		f0=10 MHz, Eight Bits Toggling at f1=5 MHz,
		OE=GND, VIN=3.4V or VIN=GND
Notes:

7.Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.

8.This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

9. IC	=	IQUIESCENT + IINPUTS + IDYNAMIC
IC	=	ICC+ ICCDHNT+ICCD(f0/2 + f1N1)
ICC	=	Quiescent Current with CMOS input levels
ICC	=	Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH	=	Duty Cycle for TTL inputs HIGH
NT	=	Number of TTL inputs at DH
ICCD =		Dynamic Current caused by an input transition pair (HLH or LHL)
f0	=	Clock frequency for registered devices, otherwise zero
f1	=	Input signal frequency
N1	=	Number of inputs changing at f1

All currents are in milliamps and all frequencies are in megahertz.

10. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

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