Texas Instruments CY74FCT573CTQC, CY74FCT573ATSOCT, CY74FCT573ATSOC, CY74FCT573ATQC, CY74FCT573ATPC Datasheet

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.

CY54/74FCT373T

CY54/74FCT573T

SCCS021 - May 1994 - Revised February 2000

8-Bit Latches

Features

•Function and pinout compatible with FCT, and F logic

•FCT-C speed at 4.2 ns max. (Com’l),

FCT-A speed at 5.2 ns max. (Com’l)

• Reduced V (typically = 3.3V) versions of equivalent

OH

FCT functions

•Edge-rate control circuitry for significantly improved noise characteristics

•Power-off disable feature

•ESD > 2000V

•Matched rise and fall times

•Extended commercial range of−40˚C to +85˚C

•Fully compatible with TTL input and output logic levels

• Sink current	64 mA (Com’l), 32 mA (Mil)
Source current	32 mA (Com’l), 12 mA (Mil)

Functional Description

The FCT373T and FCT573T consist of eight latches with three-state outputs for bus organized applications. When latch enable (LE) is HIGH, the flip-flops appear transparent to the data. Data that meets the required set-up times are latched when LE transitions from HIGH to LOW. Data appears on the bus when the (OE) is LOW. When output enable is HIGH, the bus output is in the impedance state. In this mode, data may be entered into the latches. The FCT573T is identical to the FCT373T except for the flow-through pinout, which simplifies board design.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

Logic Block Diagram

D0

D1

D2

D3

D4

D5

D6

D7

LE

CP

D

CP

D

CP

D

CP

D

CP

D

CP

D

CP

D

CP

D

Q

Q

Q

Q

Q

Q

Q

Q

OE

O0

O1

O2

O3

O4

O5

O6

O7

Pin Configurations

			DIP/SOIC/QSOP									DIP/SOIC/QSOP
					Top View									Top View
										OE		1			20		VCC
OE			1			20		VCC	D0
O			2			19		O7				2			19		O0
0									D1			3			18		O1
D0			3			18		D7
D1			4			17		D6	D2			4			17		O2
					FCT373T				D3			5		FCT573T			O3
O			5					O							16
1						16		6	D4			6			15		O4
O2			6			15		O5
D2			7			14		D5	D5			7			14		O5
D3			8			13		D4	D6			8			13		O6
O3			9			12		O4	D7			9			12		O7
									GND			10			11		LE
GND			10			11		LE

Logic Symbol

D0 D1 D2 D3 D4 D5 D6 D7

LE

OE

O0 O1 O2 O3 O4 O5 O6 O7

Copyright © 2000, Texas Instruments Incorporated

CY54/74FCT373T

CY54/74FCT573T

Function Table[1]

			Inputs		Outputs
			LE	D	O
	OE
	L		H	H	H
	L		H	L	L
	L		L	X	Q0
	H		X	X	Z

Maximum Ratings[2, 3]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–65°C to +150°C
Ambient Temperature with	–65°C to +135°C
Power Applied .............................................

Electrical Characteristics Over the Operating Range

Supply Voltage to Ground Potential...............	–0.5V to +7.0V
DC Input Voltage ...........................................	–0.5V to +7.0V
DC Output Voltage.........................................	–0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......		120 mA
Power Dissipation ..........................................................		0.5W
Static Discharge Voltage............................................		>2001V

(per MIL-STD-883, Method 3015)

Operating Range

		Ambient
Range	Range	Temperature	VCC
Commercial	T, AT, CT	–40°C to +85°C	5V ± 5%
Military[4]	All	–55°C to +125°C	5V ± 10%

Parameter		Description			Test Conditions			Min.	Typ.[5]	Max.	Unit
VOH		Output HIGH Voltage	VCC=Min., IOH=–32 mA				Com’l	2.0			V
			VCC=Min., IOH=–15 mA				Com’l	2.4	3.3		V
			VCC=Min., IOH=–12 mA				Mil	2.4	3.3		V
VOL		Output LOW Voltage	VCC=Min., IOL=64 mA				Com’l		0.3	0.55	V
			VCC=Min., IOL=32 mA				Mil		0.3	0.55	V
VIH		Input HIGH Voltage						2.0			V
VIL		Input LOW Voltage								0.8	V
VH		Hysteresis[6]	All inputs						0.2		V
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=–18 mA						–0.7	–1.2	V
II		Input HIGH Current	VCC=Max., VIN=VCC							5	A
IIH		Input HIGH Current	VCC=Max., VIN=2.7V							±1	A
IIL		Input LOW Current	VCC=Max., VIN=0.5V							±1	A
IOZH		Off State HIGH-Level Output	VCC=Max., VOUT=2.7V							10	A
		Current
IOZL		Off State LOW-Level	VCC=Max., VOUT=0.5V							–10	A
		Output Current
I	OS	Output Short Circuit Current[7]	V	CC	=Max., V	0.0V		–60	–120	–225	mA
					OUT=
IOFF		Power-Off Disable	VCC=0V, VOUT=4.5V							±1	A

Notes:

1.H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care

Z = HIGH Impedance

Qn = Previous state of flip flops (Qn-1)

2.Unless otherwise noted, these limits are over the operating free-air temperature range.

3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

4.TA is the “instant on” case temperature.

5.Typical values are at VCC=5.0V, TA=+25˚C ambient.

6.This parameter is specified but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

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CY54/74FCT373T

CY54/74FCT573T

Capacitance[6]

Parameter		Description	Typ.[5]	Max.	Unit
CIN	Input Capacitance		6	10	pF
COUT	Output Capacitance		8	12	pF

Power Supply Characteristics

Parameter	Description	Test Conditions	Typ.[5]	Max.	Unit
ICC	Quiescent Power Supply Current	VCC=Max., VIN ≤ 0.2V, VIN ≥ VCC – 0.2V	0.1	0.2	mA
ICC	Quiescent Power Supply Current	VCC=Max., VIN=3.4V, f1=0, Outputs Open[8]	0.5	2.0	mA
	(TTL inputs HIGH)
ICCD	Dynamic Power Supply Current[9]	VCC=Max., One Input Toggling,	0.6	0.12	mA/MHz
		50% Duty Cycle, Outputs Open,
		OE=GND, VIN ≤ 0.2V or VIN ≥ VCC – 0.2V
IC	Total Power Supply Current[10]	VCC=Max., 50% Duty Cycle, Outputs Open,	0.7	1.4	mA
		One Bit Toggling at f1=10 MHz,
		OE=GND, LE=VCC
		VIN ≤ 0.2V or VIN ≥ VCC – 0.2V
		VCC=Max., 50% Duty Cycle, Outputs Open,	1.0	2.4	mA
		One Bit Toggling at f1=10 MHz,
		OE=GND, LE=VCC, VIN=3.4V or VIN=GND
		VCC=Max., 50% Duty Cycle, Outputs Open,	1.3	2.6[11]	mA
		Eight Bits Toggling at f1=2.5 MHz,
		OE=GND, LE=VCC,
		VIN ≤ 0.2V or VIN ≥ VCC – 0.2V
		VCC=Max., 50% Duty Cycle, Outputs Open,	3.3	10.6[11]	mA
		Eight Bits Toggling at f1=2.5 MHz,
		OE=GND, LE=VCCVIN=3.4V or VIN=GND
Notes:

8.Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.

9.This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

10. IC	= IQUIESCENT + IINPUTS + IDYNAMIC
IC	=	ICC+ ICCDHNT+ICCD(f0/2 + f1N1)
ICC	= Quiescent Current with CMOS input levels
ICC	= Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH	= Duty Cycle for TTL inputs HIGH
NT	= Number of TTL inputs at DH
ICCD	= Dynamic Current caused by an input transition pair (HLH or LHL)
f0	= Clock frequency for registered devices, otherwise zero
f1	=	Input signal frequency
N1	=	Number of inputs changing at f1

All currents are in milliamps and all frequencies are in megahertz.

11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

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