Texas Instruments CY74FCT2257CTSOCT, CY74FCT2257CTSOC, CY74FCT2257CTQCT, CY74FCT2257CTQC, CY74FCT2257ATQCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modified to remove devices not offered.

CY74FCT2257T

SCCS038 - September 1994 - Revised March 2000

Features

•Function and pinout compatible with FCT and F logic

•25Ω output series resistors to reduce transmission line reflection noise

•FCT-C speed at 4.3 ns max.,

FCT-A speed at 5.0 ns max.

•TTL output level versions of equivalent FCT functions

•Edge-rate control circuitry for significantly improved noise characteristics

•Power-off disable feature

•Fully compatible with TTL input and output logic levels

•ESD > 2000V

•Sink current 12 mA Source current15 mA

•Extended commercial temp. range of –40˚C to +85˚C

•Three-state outputs

Quad 2-Input Multiplexer

Functional Description

The FCT2257T has four identical two-input multiplexers that select four bits of data from two sources under the control of a common data Select input (S). The I0 inputs are selected when the Select input is LOW and the I1 inputs are selected when the Select input is HIGH. Data appears at the output in true non-inverted form for the FCT2257T. On-chip termination resistors have been added to the outputs to reduce system noise caused by reflections. The FCT2257T can be used to replace the FCT257T to reduce noise in an existing design.

The FCT2257T is a logic implementation of a four-pole, two-position switch where the position of the switch is determined by the logic levels supplied to the select input. Outputs are forced to a high-impedance “OFF” state when the Output Enable input (OE) is HIGH.

All but one device must be in the high-impedance state to avoid currents exceeding the maximum ratings if outputs are tied together. Design of the output enable signals must ensure that there is no overlap when outputs of three-state devices are tied together.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

Logic Block Diagram

Pin Configurations

I0a	I1a	I0b	I1b	I0c	I1c	I0d	I1d	S
									SOIC/QSOP
										Top View
OE								S	1	16	VCC
								I0a
									2	15	OE
								I1a	3	14	I0c
								Ya	4	13	I1c
								I0b	5	12	Yc
								I1b	6	11	I0d

Yb	7	10			I1d
GND					Yd
	8	9
		FCT2257T–3

Ya

Yb

Yc

Yd

FCT2257T–1

Pin Description

	Name		Description
	I		Data Inputs
	S		Common Select Input
			Enable Inputs (Active LOW)
	OE
	Y		Data Outputs

Function Table[1]

				Inputs			Output
			S		I0	I1	Y
	OE
	H		X		X	X	Z
	L		H		X	L	L
	L		H		X	H	H
	L		L		L	X	L
	L		L		H	X	H

Note:

1.H = HIGH Voltage Level, L = LOW Voltage Level, X = Don’t Care, Z = High impedance (OFF) state.

Copyright © 2000, Texas Instruments Incorporated

CY74FCT2257T

Maximum Ratings[2, 3]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–65°C to +150°C
Ambient Temperature with	–65°C to +135°C
Power Applied .............................................
Supply Voltage to Ground Potential ...............	–0.5V to +7.0V
DC Input Voltage............................................	–0.5V to +7.0V
DC Output Voltage .........................................	–0.5V to +7.0V

Electrical Characteristics Over the Operating Range

DC Output Current (Maximum Sink Current/Pin) ......	120 mA
Power Dissipation ..........................................................	0.5W
Static Discharge Voltage............................................	>2001V
(per MIL-STD-883, Method 3015)

Operating Range

	Ambient
Range	Temperature	VCC
Commercial	–40°C to +85°C	5V ± 5%

Parameter		Description		Test Conditions	Min.	Typ.[5]	Max.	Unit
VOH		Output HIGH Voltage	VCC=Min., IOH=–15 mA		2.4	3.3		V
VOL		Output LOW Voltage	VCC=Min., IOL=12 mA			0.3	0.55	V
ROUT		Output Resistance	VCC=Min., IOL=12 mA		20	25	40	Ω
VIH		Input HIGH Voltage			2.0			V
VIL		Input LOW Voltage					0.8	V
VH		Hysteresis[6]	All inputs			0.2		V
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=–18 mA			–0.7	–1.2	V
IIH		Input HIGH Current	VCC=Max., VIN=2.7V				±1	µA
IIL		Input LOW Current	VCC=Max., VIN=0.5V				±1	µA
IOZH		Off State HIGH-Level Output	VCC=Max., VOUT=2.7V				10	µA
		Current
IOZL		Off State LOW-Level	VCC=Max., VOUT=0.5V				–10	µA
		Output Current
I	OS	Output Short Circuit Current[7]	V	=Max., V =0.0V	–60	–120	–225	mA
			CC	OUT
IOFF		Power-Off Disable	VCC=0V, VOUT=4.5V				±1	µA

Capacitance[6]

Parameter	Description	Test Conditions	Typ.[5]	Max.	Unit
CIN	Input Capacitance		5	10	pF
COUT	Output Capacitance		9	12	pF
Notes:

2.Unless otherwise noted, these limits are over the operating free-air temperature range.

3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

4.TA is the “instant on” case temperature.

5.Typical values are at VCC=5.0V, TA=+25˚C ambient.

6.This parameter is specified but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

2