Texas Instruments CY74FCT16501ETPVCT, CY74FCT16501ETPVC, CY74FCT16501ETPAC, CY74FCT16501ATPVCT, CY74FCT16501ATPVC Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.			CY74FCT16501T
Data sheet modified to remove devices not offered.
			CY74FCT162501T
			CY74FCT162H501T
		18-Bit Registered Transceivers
SCCS057 - August 1994 - Revised March 2000

Features

•FCT-E speed at 3.8 ns

•Power-off disable outputs permits live insertion

•Edge-rate control circuitry for significantly improved noise characteristics

•Typical output skew < 250 ps

•ESD > 2000V

•TSSOP (19.6 mil pitch) and SSOP (25-mil pitch) packages

•Industrial temperature range of−40˚C to +85˚C

•VCC = 5V ± 10%

CY74FCT16501T Features:
• 64 mA sink current, 32 mA source current
• Typical V	(ground bounce) <1.0V at V	CC	= 5V,
OLP

TA = 25˚C

CY74FCT162501T Features:

•Balanced 24 mA output drivers

•Reduced system switching noise

• Typical V	(ground bounce) <0.6V at V	CC	= 5V,
OLP
TA= 25˚C

CY74FCT162H501T Features:

•Bus hold retains last active state

•Eliminates the need for external pull-up or pull-down resistors

Functional Description

These 18-bit universal bus transceivers can be operated in transparent, latched or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B-to-A is similar to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA. The output buffers are designed with a power-off disable feature to allow live insertion of boards.

The CY74FCT16501T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

THE CY74FCT162501T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162501T is ideal for driving transmission lines.

The CY74FCT162H501T is a 24-mA balanced output part, that has “bus hold” on the data inputs. The device retains the input’s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.

	Functional Block Diagram				Pin Configuration
						SSOP/TSSOP
						Top View
					OEAB	1	56	GND
					LEAB	2	55	CLKAB
					A1	3	54	B1
					GND	4	53	GND
	OEAB				A2	5	52	B2
					A3	6	51	B3
	CLKBA				VCC	7	50	VCC
	LEBA				A4	8	49	B4
					A5	9	48	B5
	OEBA				A6	10	47	B6
					GND	11	46	GND
	CLKAB				A7	12	45	B7
	LEAB				A8	13	44	B8
					A9	14	43	B9
		C	C		A10	15	42	B10
				B1	A11	16	41	B11
	A 1	D	D
					A12	17	40	B12
					GND	18	39	GND
		C	C		A13	19	38	B13
					A14	20	37	B14
		D	D
					A15	21	36	B15
					VCC	22	35	VCC
					A 16	23	34	B16
					A 17	24	33	B17
		TO 17 OTHER CHANNELS		FCT16501-1	GND	25	32	GND
					A 18	26	31	B18
					OEBA	27	30	CLKBA
					LEBA	28	29	GND
								FCT16501-2

Copyright © 2000, Texas Instruments Incorporated

CY74FCT16501T

CY74FCT162501T

CY74FCT162H501T

Pin Description

	Name		Description
	OEAB		A-to-B Output Enable Input
			B-to-A Output Enable Input (Active LOW)
	OEBA
	LEAB		A-to-B Latch Enable Input
	LEBA		B-to-A Latch Enable Input
	CLKAB		A-to-B Clock Input
	CLKBA		B-to-A Clock Input
	A		A-to-B Data Inputs or B-to-A Three-State
			Outputs[1]
	B		B-to-A Data Inputs or A-to-B Three-State
			Outputs[1]

Maximum Ratings[6, 7]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature ....................................	−55°C to +125°C
Ambient Temperature with	−55°C to +125°C
Power Applied..................................................
DC Input Voltage.................................................	−0.5V to +7.0V
DC Output Voltage..............................................	−0.5V to +7.0V
DC Output Current	−60 to +120 mA
(Maximum Sink Current/Pin)...........................
Power Dissipation..........................................................	1.0W
Static Discharge Voltage ...........................................	>2001V
(per MIL-STD-883, Method 3015)

Function Table[2, 3]

	Inputs				Outputs
OEAB	LEAB	CLKAB		A	B
L	X	X		X	Z
H	H	X		L	L
H	H	X		H	H
H	L			L	L
H	L			H	H
H	L	L		X	B[4]
H	L	H		X	B[5]

Notes:

Operating Range

	Ambient
Range	Temperature	VCC
Industrial	−40°C to +85°C	5V ± 10%

1.On the 74FCT162H501T these pins have bus hold.

2.A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, and CLKBA.

3.H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care

Z = High-impedance

= LOW-to-HIGH Transition

4.Output level before the indicated steady-state input conditions were established.

5.Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.

6.Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.

7.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

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CY74FCT16501T

CY74FCT162501T

CY74FCT162H501T

Electrical Characteristics Over the Operating Range

Parameter

Description

Test Conditions

Min.

Typ.[8]

Max.

Unit

VIH

Input HIGH Voltage

2.0

V

VIL

Input LOW Voltage

0.8

V

VH

Input Hysteresis[9]

100

mV

VIK

Input Clamp Diode Voltage

VCC=Min., IIN=−18 mA

−0.7

−1.2

V

IIH

Input HIGH Current

Standard

VCC=Max., VI=VCC

±1

µA

Bus Hold

±100

IIL

Input LOW Current

Standard

VCC=Max., VI=GND

±1

µA

Bus Hold

±100

µA

I

BBH

Bus Hold Sustain Current on Bus Hold Input[10]

V

CC

=Min.,

V

=2.0V

−50

µA

I

IBBL

VI=0.8V

+50

µA

IBHHO

Bus Hold Overdrive Current on Bus Hold In-

VCC=Max., VI=1.5V

TBD

mA

IBHLO

put[10]

IOZH

High Impedance Output Current

VCC=Max., VOUT=2.7V

±1

µA

(Three-State Output pins)

IOZL

High Impedance Output Current

VCC=Max., VOUT=0.5V

±1

µA

(Three-State Output pins)

I

OS

Short Circuit Current[11]

V

CC

=Max., V

=GND

−80

−140

−200

mA

OUT

I

O

Output Drive Current[11]

V

CC

=Max., V

=2.5V

−50

−180

mA

OUT

I

OFF

Power-Off Disable

V

CC

=0V, V

≤4.5V[12]

±1

µA

OUT

Output Drive Characteristics for CY74FCT16501T

Parameter	Description	Test Conditions	Min.	Typ.[8]	Max.	Unit
VOH	Output HIGH Voltage	VCC=Min., IOH=−3 mA	2.5	3.5		V
		VCC=Min., IOH=−15 mA	2.4	3.5
		VCC=Min., IOH=−32 mA	2.0	3.0
VOL	Output LOW Voltage	VCC=Min., IOL=64 mA		0.2	0.55	V

Output Drive Characteristics for CY74FCT162501T, CY74FCT162H501T

Parameter

Description

Test Conditions

Min.

Typ.[8]

Max.

Unit

IODL

Output LOW Current[11]

VCC=5V, VIN=VIH or VIL, VOUT=1.5V

60

115

150

mA

I

ODH

Output HIGH Current[11]

V

CC

=5V, V

=V

IH

or V

IL

, V =1.5V

−60

−115

−150

mA

IN

OUT

VOH

Output HIGH Voltage

VCC=Min., IOH=−24 mA

2.4

3.3

V

VOL

Output LOW Voltage

VCC=Min., IOL=24 mA

0.3

0.55

V

Notes:

8.Typical values are at VCC= 5.0V, TA= +25˚C ambient.

9.This parameter is specified but not tested.

10.Pins with bus hold are described in Pin Description.

11.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

12.Tested at +25˚C.

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