Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT163500
SCCS066 - June 1997 - Revised March 2000
18-Bit Registered Transceiver
Features
• Low power, pin-compatible replacement for LCX and LPT families
• 5V tolerant inputs and outputs
• 24 mA balanced drive outputs
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for reduced noise
• FCT-C speed at 4.6 ns
• Latch-up performance exceeds JEDEC standard no. 17
• ESD > 2000V per MIL-STD-883D, Method 3015
• Typical output skew < 250ps
• Industrial temperature range of –40˚C to +85˚C
• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)
• Typical V (ground bounce) performance exceeds Mil olp
Std 883D
• VCC = 2.7V to 3.6V
Functional Description
The CY74FCT163500 is an 18-bit universal bus transceiver that can be operated in transparent, latched, or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the HIGH-to-LOW transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B-to-A is similar to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA.
The CY74FCT163500 has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce.The inputs and outputs are capable of being driven by 5.0V busses, allowing them to be used in mixed voltage systems as translators. The outputs are also designed with a power off disable feature enabling them to be used in applications requiring live insertion.
Logic Block Diagram |
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Pin Configuration |
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SSOP/TSSOP |
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Top View |
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OEAB |
1 |
56 |
GND |
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LEAB |
2 |
55 |
CLKAB |
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A1 |
3 |
54 |
B1 |
OEAB |
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GND |
4 |
53 |
GND |
CLKBA |
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A2 |
5 |
52 |
B2 |
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A3 |
6 |
51 |
B3 |
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LEBA |
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VCC |
7 |
50 |
VCC |
OEBA |
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A4 |
8 |
49 |
B4 |
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A5 |
9 |
48 |
B5 |
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CLKAB |
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A6 |
10 |
47 |
B6 |
LEAB |
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GND |
11 |
46 |
GND |
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A7 |
12 |
45 |
B7 |
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C |
C |
A8 |
13 |
44 |
B8 |
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A9 |
14 |
43 |
B9 |
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B1 |
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A1 |
D |
D |
A10 |
15 |
42 |
B |
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10 |
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A11 |
16 |
41 |
B11 |
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A12 |
17 |
40 |
B12 |
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C |
C |
GND |
18 |
39 |
GND |
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A13 |
19 |
38 |
B13 |
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D |
D |
A14 |
20 |
37 |
B14 |
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A15 |
21 |
36 |
B15 |
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VCC |
22 |
35 |
VCC |
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A16 |
23 |
34 |
B16 |
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TO 17 OTHER CHANNELS |
A17 |
24 |
33 |
B17 |
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GND |
25 |
32 |
GND |
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A18 |
26 |
31 |
B18 |
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OEBA |
27 |
30 |
CLKBA |
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LEBA |
28 |
29 |
GND |
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Copyright © 2000, Texas Instruments Incorporated
CY74FCT163500
Pin Summary
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Name |
Description |
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OEAB |
A-to-B Output Enable Input |
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B-to-A Output Enable Input (Active LOW) |
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OEBA |
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LEAB |
A-to-B Latch Enable Input |
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LEBA |
B-to-A Latch Enable Input |
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A-to-B Clock Input (Active LOW) |
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CLKAB |
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B-to-A Clock Input (Active LOW) |
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CLKBA |
AA-to-B Data Inputs or B-to-A Three-State Outputs
BB-to-A Data Inputs or A-to-B Three-State Outputs
Maximum Ratings[5, 6]
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................ |
−55°C to +125°C |
Ambient Temperature with |
−55°C to +125°C |
Power Applied ................................................. |
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Supply Voltage Range ..................................... |
0.5V to +4.6V |
DC Input Voltage ................................................. |
−0.5V to +7.0V |
DC Output Voltage .............................................. |
−0.5V to +7.0V |
DC Output Current |
−60 to +120 mA |
(Maximum Sink Current/Pin) ........................... |
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Power Dissipation .......................................................... |
1.0W |
Function Table[1, 2]
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Inputs |
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Outputs |
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OEAB |
LEAB |
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A |
B |
CLKAB |
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L |
X |
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X |
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X |
Z |
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H |
H |
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X |
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L |
L |
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H |
H |
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X |
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H |
H |
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H |
L |
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L |
L |
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H |
L |
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H |
H |
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H |
L |
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H |
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X |
B[3] |
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H |
L |
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L |
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X |
B[4] |
Notes:
Static Discharge Voltage............................................ |
>2001V |
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(per MIL-STD-883, Method 3015) |
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Operating Range |
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Ambient |
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Range |
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Temperature |
VCC |
Industrial |
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−40°C to +85°C |
2.7V to 3.6V |
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1.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = HIGH Impedance. = HIGH-to-LOW Transition.
2.A-to-B data flow is shown, B-to-A data flow is similar but uses OEBA, LEBA, and CLKBA.
3.Output level before the indicated steady-state input conditions were established.
4.Output level before the indicated steady-state input conditions were established, provided that CLKAB was LOW before LEAB went LOW.
5.Operation beyond the limits set forth may impair the useful life of the device. Unless noted, these limits are over the operating free-air temperature range.
6.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
2
CY74FCT163500
Electrical Characteristics Over the Operating Range VCC=2.7V to 3.6V
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Parameter |
Description |
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Test Conditions |
Min. |
Typ.[7] |
Max. |
Unit |
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VIH |
Input HIGH Voltage |
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All Inputs |
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2.0 |
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5.5 |
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V |
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VIL |
Input LOW Voltage |
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0.8 |
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V |
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VH |
Input Hysteresis[8] |
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100 |
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mV |
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VIK |
Input Clamp Diode Voltage |
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VCC=Min., IIN=−18 mA |
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−0.7 |
−1.2 |
V |
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IIH |
Input HIGH Current |
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VCC=Max., VI=5.5V |
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±1 |
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µA |
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IIL |
Input LOW Current |
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VCC=Max., VI=GND. |
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±1 |
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µA |
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IOZH |
High Impedance Output Current |
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VCC=Max., VOUT=5.5V |
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±1 |
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µA |
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(Three-State Output pins) |
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IOZL |
High Impedance Output Current |
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VCC=Max., VOUT=GND |
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±1 |
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µA |
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(Three-State Output pins) |
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IODL |
Output LOW Current[9] |
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VCC=3.3V, VIN=VIH |
45 |
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180 |
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mA |
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or VIL, VOUT=1.5V |
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ODH |
Output HIGH Current[9] |
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V |
CC |
=3.3V, V |
IN |
=V |
IH |
–45 |
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–180 |
mA |
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or VIL, VOUT=1.5V |
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VOH |
Output HIGH Voltage |
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VCC=Min., IOH= –0.1 mA |
VCC–0.2 |
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V |
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VCC=3.0V, IOH= –8 mA |
2.4 |
3.0 |
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V |
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VCC=3.0V, IOH= –24 mA |
2.0 |
3.0 |
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V |
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VOL |
Output LOW Voltage |
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VCC=Min., IOL= 0.1mA |
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0.2 |
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V |
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VCC=Min., IOL= 24 mA |
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0.3 |
0.5 |
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I |
OS |
Short Circuit Current[9] |
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V |
=Max., V |
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=GND |
–60 |
–135 |
–240 |
mA |
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CC |
OUT |
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IOFF |
Power-Off Disable |
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VCC=0V, VOUT≤4.5V |
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±100 |
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µA |
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Capacitance[8] (T = +25˚C, f = 1.0 MHz) |
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A |
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Parameter |
Description |
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Test Conditions |
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Typ.[7] |
Max. |
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Unit |
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CIN |
Input Capacitance |
VIN = 0V |
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4.5 |
6.0 |
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pF |
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COUT |
Output Capacitance |
VOUT = 0V |
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5.5 |
8.0 |
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pF |
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Notes: |
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7.Typical values are at VCC=3.3V, TA = +25˚C ambient.
8.This parameter is specified but not tested.
9.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.
3