Texas Instruments CY74FCT2574ATQCT, CY74FCT2574ATQC, CY74FCT2574TSOCT, CY74FCT2574TSOC, CY74FCT2574CTSOCT Datasheet

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Texas Instruments CY74FCT2574ATQCT, CY74FCT2574ATQC, CY74FCT2574TSOCT, CY74FCT2574TSOC, CY74FCT2574CTSOCT Datasheet

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modiﬁed to remove devices not offered.

CY74FCT2374T

CY74FCT2574T

SCCS040 - September 1994 - Revised March 2000

8-Bit Registers

Features

Functional Description

• Function and pinout compatible with FCT and F logic

• 25Ω output series resistors to reduce transmission line reﬂection noise

• FCT-C speed at 5.2 ns max.

• Reduced V (typically=3.3V) versions of equivalent

FCT functions

•Edge-rate control circuitry for signiﬁcantly improved noise characteristics

•Power-off disable feature

•Matched rise and fall times

•Fully compatible with TTL input and output logic levels

•ESD > 2000V

• Sink current	12 mA
Source current	15 mA

•Edge-triggered D-type inputs

•250 MHz typical toggle rate

•Extended commercial temp. range of –40˚C to +85˚C

The FCT2374T and FCT2574T are high-speed low-power octal D-type ﬂip-ﬂops featuring separate D-type inputs for each ﬂip-ﬂop. On-chip termination resistors have been added to the outputs to reduce system noise caused by reﬂections. The FCT2374T and FCT2574T can be used to replace the FCT374T and FCT574T to reduce noise in an existing design. Both devices have three-state outputs for bus oriented applications. A buffered clock (CP) and output enable (OE) are common to all ﬂip-ﬂops. The FCT2574T is identical to the FCT2374T except that all the outputs are on one side of the package and inputs on the other side. The ﬂip-ﬂops contained in the FCT2374T and FCT2574T will store the state of their individual D inputs that meet the set-up and hold time require- ments on the LOW-to-HIGH clock (CP) transition. When OE is LOW, the contents of the ﬂip-ﬂops are available at the outputs. When OE is HIGH, the outputs will be in the high-impedence state. The state of output enable does not affect the state of the ﬂip-ﬂops.

The outputs are designed with a power-off disable feature to allow for live insertion of boards.

Logic Block Diagram

Logic Symbol

FCT2374T-5

FCT2374T-6

Pin Configurations

SOIC/QSOP

Top View

VCC

5 FCT2374T 16

5 FCT2574 16

GND

FCT2374T-2

FCT2374T-4

CY74FCT2374T

CY74FCT2574T

Function Table[1]

	Inputs		Outputs

D	CP		O
D	CP	OE	O

H		L	H



L		L	L



X	X	H	Z

Supply Voltage to Ground Potential...............	–0.5V to +7.0V
DC Input Voltage ...........................................	–0.5V to +7.0V
DC Output Voltage.........................................	–0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......		120 mA
Power Dissipation ..........................................................		0.5W
Static Discharge Voltage............................................		>2001V
(per MIL-STD-883, Method 3015)

Maximum Ratings[2, 3]

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................	–65°C to +150°C
Ambient Temperature with	–65°C to +135°C
Power Applied .............................................	–65°C to +135°C

Electrical Characteristics Over the Operating Range

Operating Range

	Ambient
Range	Temperature	VCC
Commercial	–40°C to +85°C	5V ± 5%

Parameter		Description			Test Conditions	Min.	Typ.[5]	Max.	Unit
VOH		Output HIGH Voltage	VCC=Min., IOH=–15 mA			2.4	3.3		V
VOL		Output LOW Voltage	VCC=Min., IOL=12 mA				0.3	0.55	V
ROUT		Output Resistance	VCC=Min., IOL=12 mA			20	25	40	Ω
VIH		Input HIGH Voltage				2.0			V
VIL		Input LOW Voltage						0.8	V
VH		Hysteresis[6]	All inputs				0.2		V
VIK		Input Clamp Diode Voltage	VCC=Min., IIN=–18 mA				–0.7	–1.2	V
II		Input HIGH Current	VCC=Max., VIN=VCC					5	µA
IIH		Input HIGH Current	VCC=Max., VIN=2.7V					±1	µA
IIL		Input LOW Current	VCC=Max., VIN=0.5V					±1	µA
IOZH		Off State HIGH-Level Output	VCC=Max., VOUT=2.7V					10	µA
		Current

IOZL		Off State LOW-Level	VCC=Max., VOUT=0.5V					–10	µA
		Output Current

I	OS	Output Short Circuit Current[7]	V	CC	=Max., V =0.0V	–60	–120	–225	mA
	OS			CC	OUT
IOFF		Power-Off Disable	VCC=0V, VOUT=4.5V					±1	µA

Capacitance[6]

Parameter	Description	Test Conditions	Typ. [5]	Max.	Unit
CIN	Input Capacitance		5	10	pF
COUT	Output Capacitance		9	12	pF
Notes:

1.H = HIGH Voltage Level. L = LOW Voltage Level X = Don’t Care

Z = HIGH Impedance

= LOW-to-HIGH clock transition

2.Unless otherwise noted, these limits are over the operating free-air temperature range.

3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

4.TA is the “instant on” case temperature.

5.Typical values are at VCC=5.0V, TA=+25˚C ambient.

6.This parameter is speciﬁed but not tested.

7.Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reﬂect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last.

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