Texas Instruments CD74HCT257M96, CD74HCT257M, CD74HCT257E, CD74HC257M, CD74HC257E Datasheet

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Data sheet acquired from Harris Semiconductor SCHS171

November 1997

CD74HC257,

CD74HCT257

High Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs

 

Features

Description

 

 

 

 

 

 

 

• Buffered Inputs

The Harris CD74HC257 and CD74HCT257 are quad 2-input

[ /Title

• Typical Propagation Delay ( In to Output ) = 12ns at

multiplexers which select four bits of data from two sources

under the control of a common Select Input (S). The Output

(CD74

VCC = 5V, CL = 15pF, TA = 25oC

Enable input

 

 

is active LOW. When

 

is HIGH, all of

(OE)

OE

HC257

• Fanout (Over Temperature Range)

the outputs (1Y-4Y) are in the high impedance state regard-

,

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

less of all other input conditions.

 

 

 

 

Moving data from two groups of registers to four common

CD74

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

HCT25

• Wide Operating Temperature Range . . . -55oC to 125oC

output busses is a common use of the 257. The state of the

Select input determines the particular register from which

7)

• Balanced Propagation Delay and Transition Times

the data comes. It can also be used as a function generator.

/Sub-

• Significant Power Reduction Compared to LSTTL

Ordering Information

 

 

 

 

ject

Logic ICs

 

 

 

 

(High

• HC Types

 

 

 

 

 

 

 

 

 

 

 

TEMP. RANGE

 

 

 

PKG.

Speed

- 2V to 6V Operation

 

 

 

 

 

 

PART NUMBER

 

(oC)

PACKAGE

NO.

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

 

CMOS

 

 

 

 

 

 

 

 

at VCC = 5V

CD74HC257E

 

-55 to 125

16 Ld PDIP

E16.3

Logic

 

• HCT Types

 

 

 

 

 

 

 

 

CD74HCT257E

 

-55 to 125

16 Ld PDIP

E16.3

Quad

- 4.5V to 5.5V Operation

 

 

 

 

 

 

 

 

 

2-Input

- Direct LSTTL Input Logic Compatibility,

CD74HC257M

 

-55 to 125

16 Ld SOIC

M16.15

Multi-

VIL= 0.8V (Max), VIH = 2V (Min)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

- CMOS Input Compatibility, Il 1 A at VOL, VOH

CD74HCT257M

 

-55 to 125

16 Ld SOIC

M16.15

plexer

 

 

 

 

 

 

 

 

 

NOTES:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1. When ordering, use the entire part number. Add the suffix 96 to

 

 

obtain the variant in the tape and reel.

 

 

 

2. Wafer or die for this part number is available which meets all

 

 

electrical specifications. Please contact your local sales office or

 

 

Harris customer service for ordering information.

 

Pinout

CD74HC257, CD74HC257

(PDIP, SOIC)

TOP VIEW

S

1

16 VCC

1I0

2

15

OE

1I1

3

14

4I0

1Y

4

13

4I1

2I0

5

12

4Y

2I1

6

11

3I0

2Y

7

10

3I1

GND

8

9

3Y

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

File Number 1650.1

 

Copyright © Harris Corporation 1997

1

Texas Instruments CD74HCT257M96, CD74HCT257M, CD74HCT257E, CD74HC257M, CD74HC257E Datasheet

CD74HC257, CD74HCT257

Functional Diagram

15

OE

1

S

4I1

13

P

 

 

 

12

4Y

 

 

 

 

 

14

N

 

 

4I0

 

 

 

 

 

 

 

3I1

10

 

9

3Y

11

 

 

3I0

 

 

 

6

 

 

 

2I1

3 CIRCUITS IDENTICAL TO CIRCUIT

7

2Y

5

2I0

IN ABOVE DASHED ENCLOSURE

 

 

3

 

 

1I1

 

 

 

2

 

4

1Y

1I0

 

 

 

TRUTH TABLE

OUTPUT

SELECT

 

 

 

ENABLE

INPUT

DATA INPUTS

OUTPUT

 

 

 

 

 

 

 

 

 

 

S

I0

I1

Y

 

OE

 

H

X

X

X

Z

 

 

 

 

 

 

 

L

L

L

X

L

 

 

 

 

 

 

 

L

L

H

X

H

 

 

 

 

 

 

 

L

H

X

L

L

 

 

 

 

 

 

 

L

H

X

H

H

 

 

 

 

 

 

 

NOTE:

H = High Voltage Level

L = Low Voltage Level

X = Don’t Care

Z = High Impedance, OFF State

2

CD74HC257, CD74HCT257

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .

-0.5V to 7V

DC Input Diode Current, IIK

±20mA

For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .

DC Output Diode Current, IOK

±20mA

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .

DC Drain Current, per Output, IO

±35mA

For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .

DC Output Source or Sink Current per Output Pin, IO

±25mA

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .

DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . .

. . . .±70mA

Thermal Information

 

Thermal Resistance (Typical, Note 3)

θJA (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 90

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 160

Maximum Junction Temperature . . . . . . . . . . . . . . . .

. . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .

-65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . .

. . . . . . . 300oC

(SOIC - Lead Tips Only)

 

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

 

 

TEST

 

 

25oC

 

-40oC TO 85oC

-55oC TO 125oC

 

 

 

CONDITIONS

 

 

 

 

PARAMETER

SYMBOL

VI (V)

IO (mA)

VCC (V)

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNITS

HC TYPES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High Level Input

VIH

-

-

2

1.5

-

-

1.5

-

1.5

-

V

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.5

3.15

-

-

3.15

-

3.15

-

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

4.2

-

-

4.2

-

4.2

-

V

 

 

 

 

 

 

 

 

 

 

 

 

 

Low Level Input

VIL

-

-

2

-

-

0.5

-

0.5

-

0.5

V

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4.5

-

-

1.35

-

1.35

-

1.35

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

-

-

1.8

-

1.8

-

1.8

V

 

 

 

 

 

 

 

 

 

 

 

 

 

High Level Output

VOH

VIH or

-0.02

2

1.9

-

-

1.9

-

1.9

-

V

Voltage

 

VIL

 

 

 

 

 

 

 

 

 

 

 

-0.02

4.5

4.4

-

-

4.4

-

4.4

-

V

CMOS Loads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-0.02

6

5.9

-

-

5.9

-

5.9

-

V

 

 

 

 

 

 

 

 

 

 

 

 

 

High Level Output

 

 

-6

4.5

3.98

-

-

3.84

-

3.7

-

V

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-7.8

6

5.48

-

-

5.34

-

5.2

-

V

TTL Loads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Low Level Output

VOL

VIH or

0.02

2

-

-

0.1

-

0.1

-

0.1

V

Voltage

 

VIL

 

 

 

 

 

 

 

 

 

 

 

0.02

4.5

-

-

0.1

-

0.1

-

0.1

V

CMOS Loads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.02

6

-

-

0.1

-

0.1

-

0.1

V

 

 

 

 

 

 

 

 

 

 

 

 

 

Low Level Output

 

 

6

4.5

-

-

0.26

-

0.33

-

0.4

V

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7.8

6

-

-

0.26

-

0.33

-

0.4

V

TTL Loads

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input Leakage

II

VCC or

-

6

-

-

±0.1

-

±1

-

±1

µA

Current

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

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