Texas Instruments CD74HCT365M96, CD74HCT365M, CD74HCT365E, CD74HC366M, CD74HC366E Datasheet

Data sheet acquired from Harris Semiconductor SCHS180

November 1997

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

High Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting

Features

Description

•

Buffered Inputs

The Harris CD74HC365, CD74HCT365, CD74HC366, and

[ /Title

•

High Current Bus Driver Outputs

CD74HCT366 silicon gate CMOS three-state buffers are

general purpose high-speed non-inverting and inverting

(CD74

•

Typical Propagation Delay t

, t

PHL

= 8ns at V

= 5V,

buffers. They have high drive current outputs which enable

PLH

CC

HC365

CL = 15pF, TA = 25oC

high speed operation even when driving large bus

,

•

Fanout (Over Temperature Range)

capacitances. These

circuits

possess the

low power

dissipation of CMOS circuitry, yet have speeds comparable to

CD74

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

low power Schottky TTL circuits. Both circuits are capable of

HCT36

-

Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

driving up to 15 low power Schottky inputs.

5,

•

Wide Operating Temperature Range . . . -55oC to 125oC

The CD74HC365 and CD74HCT365 are non-inverting buffers,

CD74

•

Balanced Propagation Delay and Transition Times

whereas the CD74HC366 and CD74HCT366 are inverting

HC366

buffers. These devices have two three-state control inputs (OE1

• Significant Power Reduction Compared to LSTTL

and OE2) which are NORed together to control all six gates.

,

Logic ICs

The CD74HCT365 and CD74HCT366 logic families are speed,

CD74

• HC Types

HCT36

function and pin compatible with the standard 74LS logic family.

-

2V to 6V Operation

Ordering Information

6)

-

High Noise Immunity: NIL = 30%, NIH = 30% of VCC

/Sub-

at VCC = 5V

TEMP. RANGE

PKG.

ject

PART NUMBER

(oC)

PACKAGE

NO.

• HCT Types

(High

CD74HC365E

-55 to 125

16 Ld PDIP

E16.3

-

4.5V to 5.5V Operation

Speed

CD74HCT365E

-55 to 125

16 Ld PDIP

E16.3

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

CD74HC366E

-55 to 125

16 Ld PDIP

E16.3

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

CD74HC365M

-55 to 125

16 Ld SOIC

M16.15

CD74HCT365M

-55 to 125

16 Ld SOIC

M16.15

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer or die for this part number is available which meets all

electrical specifications. Please contact your local sales office or

Harris customer service for ordering information.

Pinout

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

(PDIP, SOIC)

TOP VIEW

OE1

1

16 VCC

1A

2

15 OE2

(1Y) 1Y

3

14

6A

2A

4

13

6Y (6Y)

(2Y) 2Y

5

12

5A

3A

6

11

5Y (5Y)

(3Y) 3Y

7

10

4A

GND

8

9

4Y (4Y)

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.	File Number 1539.1

Copyright © Harris Corporation 1997

1

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

Functional Diagrams

	CD74HC365, CD75HCT365
OE1	1	16
		VCC
1A	2	15
		OE2
1Y	3	14
		6A
2A	4	13
		6Y
2Y	5	12
		5A
3A	6	11
		5Y
3Y	7	10
		4A
GND	8	9
		4Y

TRUTH TABLE

							OUTPUTS
			INPUTS					(Y)
						A	HC/HCT365		HC/HCT366
	OE1			OE2
	L			L		L	L		H
	L			L		H	H		L
	X			H		X	Z		Z
	H			X		X	Z		Ζ

NOTE:

H = High Voltage Level

L = Low Voltage Level

X = Don’t Care

Z = High Impedance (OFF) State

	CD74HC366, CD75HCT366
OE1	1	16
		VCC
1A	2	15
		OE2
1Y	3	14
		6A
2A	4	13
		6Y
2Y	5	12
		5A
3A	6	11
		5Y
3Y	7	10
		4A
GND	8	9
		4Y

2

CD74HC365, CD74HCT365, CD74HC366, CD74HCT366

Logic Diagram

VCC

16

ONE OF SIX IDENTICAL CIRCUITS

2

1A

(NOTE)

3

1Y

GND 8

1
OE1
	4	5
15	2A
OE2		2Y
	6	7
	3A
		3Y
	10	9
	4A
		4Y
	12	11
	5A
		5Y
	14
	6A	13
		6Y

NOTE: Inverter not included in HC/HCT365.

FIGURE 1. LOGIC DIAGRAM FOR THE HC/HCT365 AND HC/HCT366 (OUTPUTS FOR HC/HCT365 ARE COMPLEMENTS OF THOSE SHOWN, i.e., 1Y, 2Y, ETC.)

3