Texas Instruments CD74HCT273M96, CD74HCT273M, CD74HCT273E, CD74HC273SM, CD74HC273M96 Datasheet

Data sheet acquired from Harris Semiconductor SCHS174

CD74HC273,

CD74HCT273

February 1998

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

	Features				Description
	•	Common Clock and Asynchronous Master Reset			The Harris CD74HC273 and CD74HCT273 high speed octal
[ /Title	•	Positive Edge Triggering			D-Type flip-flops with a direct clear input are manufactured
					with silicon-gate CMOS technology. They possess the low
(CD74	•	Buffered Inputs			power consumption of standard CMOS integrated circuits.
HC273	•	Typical fMAX = 60MHz at VCC = 5V, CL = 15pF,			Information at the D inputis transferred to the Q outputs on
,
		T = 25oC			the positive-going edge of the clock pulse. All eight flip-flops
CD74		A			are controlled by a common clock (CP) and a common reset
	•	Fanout (Over Temperature Range)
HCT27					(MR). Resetting is				accomplished	by a low voltage level
		- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
					independent of the clock. All eight Q outputs are reset to a
3)		- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
					logic 0.
/Sub-	•	o	o	C	Ordering Information
ject		Wide Operating Temperature Range . . . -55 C to 125
	•	Balanced Propagation Delay and Transition Times
(High									TEMP. RANGE		PKG.
	•	Significant Power Reduction Compared to LSTTL				PART NUMBER				PACKAGE
Speed									(oC)		NO.
		Logic ICs
						CD54HC273F			-55 to 125	20 Ld CERDIP	F20.3
CMOS	• HC Types
Logic						CD54HCT273F			-55 to 125	20 Ld CERDIP	F20.3
		- 2V to 6V Operation
Octal		- High Noise Immunity: NIL = 30%, NIH = 30% of VCC				CD74HC273E			-55 to 125	20 Ld PDIP	E20.3
D-		at VCC = 5V
						CD74HCT273E			-55 to 125	20 Ld PDIP	E20.3
Type	• HCT Types
						CD74HC273M			-55 to 125	20 Ld SOIC	M20.3
Flip-		- 4.5V to 5.5V Operation
						CD74HCT273M			-55 to 125	20 Ld SOIC	M20.3
		- Direct LSTTL Input Logic Compatibility,
		VIL= 0.8V (Max), VIH = 2V (Min)			NOTES:
		- CMOS Input Compatibility, Il ≤ 1 A at VOL, VOH				1. When ordering, use the entire part number. Add the suffix 96 to
						obtain the variant in the tape and reel.
						2. Wafer and die for this part number is available which meets all
						electrical specifications. Please contact your local sales office or
						Harris customer service for ordering information.

Pinout

CD54HC273, CD54HCT273, CD74HC273, CD74HCT273

(PDIP, SOIC, CERDIP)

TOP VIEW

MR	1	20	VCC
Q0	2	19	Q7

D0

3

18

D7

D1

4

17

D6

Q1

5

16

Q6

Q2

6

15

Q5

D2

7

14

D5

D3

8

13

D4

Q3

9

12

Q4

GND 10

11 CP

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.	File Number 1479.2

Copyright © Harris Corporation 1998

1

CD74HC273, CD74HCT273

Functional Diagram

CLOCK
CP
	D0	Q0
	D1	Q1
	D2	Q2
DATA	D3	Q3	DATA
INPUTS	D4	Q4	OUTPUTS
	D5	Q5
	D6	Q6
	D7	Q7

RESET MR

TRUTH TABLE

			INPUTS		OUTPUT
RESET			CLOCK CP	DATA Dn	Q
	(MR)
L			X	X	L
H			↑	H	H
H			↑	L	L
H			L	X	Q0

NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, ↑ = Transition from Low to High Level, Q0 = Level Before the Indicated Steady-State Input Conditions Were Established.

2

CD74HC273, CD74HCT273

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .	-0.5V to 7V
DC Input Diode Current, IIK	±20mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .
DC Output Diode Current, IOK	±20mA
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .
DC Drain Current, per Output, IO	±25mA
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .
DC Output Source or Sink Current per Output Pin, IO	±25mA
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . .	. . . .±50mA

Thermal Information

Thermal Resistance (Typical, Note 3)	θJA (oC/W)		θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .		125	N/A
CERDIP Package . . . . . . . . . . . . . . . .		105	44
SOIC Package . . . . . . . . . . . . . . . . . . .		120	N/A
Maximum Junction Temperature . . . . . . . .	. . .	. . . . . . . .	. . . . 150oC
Maximum Storage Temperature Range . . .	. . .	. . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . .		. . . . . . .	. . . . 300oC

(SOIC - Lead Tips Only)

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)

6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

		TEST				25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS
PARAMETER	SYMBOL	VI (V)	IO (mA)	VCC (V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HC TYPES
High Level Input	VIH	-	-	2	1.5	-	-	1.5	-	1.5	-	V
Voltage
				4.5	3.15	-	-	3.15	-	3.15	-	V
				6	4.2	-	-	4.2	-	4.2	-	V
Low Level Input	VIL	-	-	2	-	-	0.5	-	0.5	-	0.5	V
Voltage
				4.5	-	-	1.35	-	1.35	-	1.35	V
				6	-	-	1.8	-	1.8	-	1.8	V
High Level Output	VOH	VIH or	-0.02	2	1.9	-	-	1.9	-	1.9	-	V
Voltage		VIL
			-0.02	4.5	4.4	-	-	4.4	-	4.4	-	V
CMOS Loads
			-0.02	6	5.9	-	-	5.9	-	5.9	-	V
High Level Output			-4	4.5	3.98	-	-	3.84	-	3.7	-	V
Voltage
			-5.2	6	5.48	-	-	5.34	-	5.2	-	V
TTL Loads
Low Level Output	VOL	VIH or	0.02	2	-	-	0.1	-	0.1	-	0.1	V
Voltage		VIL
			0.02	4.5	-	-	0.1	-	0.1	-	0.1	V
CMOS Loads
			0.02	6	-	-	0.1	-	0.1	-	0.1	V
Low Level Output			4	4.5	-	-	0.26	-	0.33	-	0.4	V
Voltage
			5.2	6	-	-	0.26	-	0.33	-	0.4	V
TTL Loads
Input Leakage	II	VCC or	-	6	-	-	±0.1	-	±1	-	±1	µA
Current		GND
Quiescent Device	ICC	VCC or	0	6	-	-	8	-	80	-	160	µA
Current		GND

3