CD74HCT164M96
Texas Instruments CD74HCT164M96, CD74HCT164M, CD74HCT164E, CD74HC164M96, CD74HC164M Datasheet
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CD74HC164,
/
j
[ /Title
(CD74
HC164
,
CD74
HCT16
4)
Subect
(High
Speed
CMOS
Logic
8-Bit
SerialIn/Parallel-
Data sheet acquired from Harris Semiconductor
SCHS155
October 1997
Features
• Buffered Inputs
• Asynchronous Master Reset
• Typical f
T
= 25oC
A
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), VIH = 2V (Min)
IL
- CMOS Input Compatibility, I
= 50MHz at VCC = 5V, CL = 15pF,
MAX
= 30%, NIH = 30% of V
IL
≤ 1µA at VOL, V
l
o
C to 125oC
CC
OH
CD74HCT164
High Speed CMOS Logic
8-Bit Serial-In/Parallel-Out Shift Register
Description
The Harris CD74HC164 and the CD74HCT164 are 8-bit
serial-in parallel-out shift registers with asynchronous reset.
Data isshifted on the positive edge of Clock (CP). A LOW on
the Master Reset (
outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (DS1 and DS2) are provided,
either one can be used as a Data Enable control.
Ordering Information
PART NUMBER
CD74HC164E -55 to 125 16 Ld PDIP E14.3
CD74HCT164E -55 to 125 16 Ld PDIP E14.3
CD74HC164M -55 to 125 16 Ld SOIC M14.15
CD74HCT164M -55 to 125 16 Ld SOIC M14.15
NOTE:
1. When ordering, use the entire partnumber. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
MR) pin resets the shift register and all
TEMP.RANGE
(oC) PACKAGE
PKG.
NO.
Pinout
CD74HC164, CD74HCT164
(PDIP, SOIC)
TOP VIEW
DS1
DS2
Q
Q
Q
Q
GND
1
2
3
0
4
1
5
2
6
3
7
14
13
12
11
10
V
CC
Q
7
Q
6
Q
5
Q
4
MR
9
8
CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
1
File Number 1658.1
Functional Diagram
CD74HC164, CD74HCT164
3
DS1
DS2
MR
CP
1
2
98
TRUTH TABLE
4
5
6
10
11
12
13
GND = 7
= 14
V
CC
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
INPUTS OUTPUTS
OPERATING MODE
MR CP DS1 DS2 Q
0
RESET (CLEAR) L X X X L L - L
Shift H ↑ llL q
H ↑ lhL q
H ↑ hlL q
H ↑ hhH q
NOTES:
H = High Voltage Level.
h = High Voltage Level One Set-up Time Prior To The Low-to-high Clock Transition.
l = Low Voltage Level One Set-up Time Prior To The Low-to-high Clock Transition.
L =LowVoltageLevel.
X =Don’tCare.
↑ = Transitionfrom Low to High Level.
qn= Lower Case Letters Indicate The State Of the Reference Input Clock Transition.
Q1 - Q
0 -q6
0 -q6
0 -q6
0 -q6
7
2
CD74HC164, CD74HCT164
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
O
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, I
CC orIGND
. . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, V
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to V
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θJA is measured with the component mounted on an evaluation PC board in free air.
CC
Thermal Resistance (Typical, Note 2) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CC
DC Electrical Specifications
PARAMETER SYMBOL
HC TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
TEST
CONDITIONS
25oC -40oC TO 85oC -55oC TO 125oC
VCC (V)
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V
VIH or
V
-0.02 2 1.9 - - 1.9 - 1.9 - V
IL
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-0.02 6 5.9 - - 5.9 - 5.9 - V
-4 4.5 3.98 - - 3.84 - 3.7 - V
-5.2 6 5.48 - - 5.34 - 5.2 - V
VIH or
V
0.02 2 - - 0.1 - 0.1 - 0.1 V
IL
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
0.02 6 - - 0.1 - 0.1 - 0.1 V
4 4.5 - - 0.26 - 0.33 - 0.4 V
5.2 6 - - 0.26 - 0.33 - 0.4 V
VCC or
-6--±0.1 - ±1-±1 µA
GND
VCC or
0 6 - - 8 - 80 - 160 µA
GND
UNITSVI(V) IO(mA) MIN TYP MAX MIN MAX MIN MAX
3
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