Texas Instruments CD74HCT11M96, CD74HCT11M, CD74HCT11E, CD74HC11M96, CD74HC11M Datasheet

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[ /Title (CD54 HCT11

,

CD74

HC11,

CD74

HCT11

)

/Subject (High

Data sheet acquired from Harris Semiconductor SCHS273A

August 1997 - Revised May 2000

CD54/74HC11,

CD54/74HCT11

High Speed CMOS Logic

Triple 3-Input AND Gate

Features

Buffered Inputs

Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC

Fanout (Over Temperature Range)

-Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

-Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Wide Operating Temperature Range . . . -55oC to 125oC

Balanced Propagation Delay and Transition Times

Significant Power Reduction Compared to LSTTL Logic ICs

HC Types

-2V to 6V Operation

-High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

HCT Types

-4.5V to 5.5V Operation

-Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

-CMOS Input Compatibility, Il 1 A at VOL, VOH

Description

The ’HC11 and ’HCT11 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin compatible with the standard LS logic family.

Ordering Information

 

TEMP. RANGE

 

PART NUMBER

(oC)

PACKAGE

CD54HC11F

-55 to 125

14 Ld CERDIP

 

 

 

CD54HC11F3A

-55 to 125

14 Ld CERDIP

 

 

 

CD74HC11E

-55 to 125

14 Ld PDIP

 

 

 

CD74HC11M

-55 to 125

14 Ld SOIC

 

 

 

CD54HCT11F

-55 to 125

14 Ld CERDIP

 

 

 

CD54HCT11F3A

-55 to 125

14 Ld CERDIP

 

 

 

CD74HCT11E

-55 to 125

14 Ld PDIP

 

 

 

CD74HCT11M

-55 to 125

14 Ld SOIC

 

 

 

NOTES:

 

 

1. When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

2. Die for this part number is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information.

Pinout

CD54HC11, CD54HCT11 (CERDIP)

CD54HCT11, CD74HC11, CD74HCT11

(PDIP, SOIC)

TOP VIEW

1A

1

 

14

VCC

1B

 

 

 

1C

2

 

13

2A

 

 

 

1Y

3

 

12

2B

 

 

 

3C

4

 

11

2C

 

 

 

3B

5

 

10

2Y

 

 

 

3A

6

 

9

GND

 

 

 

3Y

7

 

8

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright © 2000, Texas Instruments Incorporated

1

Texas Instruments CD74HCT11M96, CD74HCT11M, CD74HCT11E, CD74HC11M96, CD74HC11M Datasheet

CD54/74HC11, CD54/74HCT11

Functional Diagram

1

14

1A

VCC

2

13

1B

1C

3

12

2A

1Y

4

11

2B

3C

5

10

2C

3B

6

9

2Y

3A

7

8

GND

3Y

TRUTH TABLE

 

INPUTS

 

OUTPUT

 

 

 

 

 

nA

 

nB

nC

nY

 

 

 

 

 

L

 

L

L

L

 

 

 

 

 

L

 

L

H

L

 

 

 

 

 

L

 

H

L

L

 

 

 

 

 

L

 

H

H

L

 

 

 

 

 

H

 

L

L

L

 

 

 

 

 

H

 

L

H

L

 

 

 

 

 

H

 

H

L

L

 

 

 

 

 

H

 

H

H

H

 

 

 

 

 

Logic Symbol

nA

nB

nY

nC

2

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