Texas Instruments CD74HCT20M96, CD74HCT20M, CD74HCT20E, CD74HC20M96, CD74HC20M Datasheet

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Data sheet acquired from Harris Semiconductor SCHS130

August 1997

CD74HC20,

CD74HCT20

High Speed CMOS Logic

Dual 4-Input NAND Gate

[ /Title (CD74H C20, CD74H CT20) /Subject (High Speed CMOS Logic Dual 4- Input

Features

Buffered Inputs

Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC

Fanout (Over Temperature Range)

-Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

-Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Wide Operating Temperature Range . . . -55oC to 125oC

Balanced Propagation Delay and Transition Times

Significant Power Reduction Compared to LSTTL Logic ICs

HC Types

-2V to 6V Operation

-High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

HCT Types

-4.5V to 5.5V Operation

-Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

-CMOS Input Compatibility, Il 1 A at VOL, VOH

Description

The Harris CD74HC20, CD74HCT20, logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The 74HCT logic family is functionally pin compatible with the standard 74LS logic family.

Ordering Information

 

TEMP. RANGE

 

PKG.

PART NUMBER

(oC)

PACKAGE

NO.

CD74HC20E

-55 to 125

14 Ld PDIP

E14.3

 

 

 

 

CD74HCT20E

-55 to 125

14 Ld PDIP

E14.3

 

 

 

 

CD74HC20M

-55 to 125

14 Ld SOIC

M14.15

 

 

 

 

CD74HCT20M

-55 to 125

14 Ld SOIC

M14.15

 

 

 

 

CD54HC20W

-55 to 125

Wafer

 

 

 

 

 

NOTES:

 

 

 

1.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

2.Die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.

Pinout

CD74HC20, CD74HCT20

(PDIP, SOIC)

TOP VIEW

1A

1

 

14

VCC

1B

 

 

 

2D

2

 

13

NC

 

 

 

2C

3

 

12

1C

 

 

 

NC

4

 

11

1D

 

 

 

2B

5

 

10

1Y

 

 

 

2A

6

 

9

GND

 

 

 

2Y

7

 

8

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

File Number 1601.1

 

Copyright © Harris Corporation 1997

1

 

 

 

Texas Instruments CD74HCT20M96, CD74HCT20M, CD74HCT20E, CD74HC20M96, CD74HC20M Datasheet

CD74HC20, CD74HCT20

Functional Diagram

1

14

1A

VCC

2

13

1B

2D

3

12

NC

2C

4

11

1C

NC

5

10

1D

2B

6

9

1Y

2A

7

8

GND

2Y

TRUTH TABLE

 

INPUTS

 

 

OUTPUT

 

 

 

 

 

 

nA

nB

 

nC

nD

nY

 

 

 

 

 

 

L

X

 

X

X

H

 

 

 

 

 

 

X

L

 

X

X

H

 

 

 

 

 

 

X

X

 

L

X

H

 

 

 

 

 

 

X

X

 

X

L

H

 

 

 

 

 

 

H

H

 

H

H

L

 

 

 

 

 

 

 

NOTE: H = High Voltage Level, L = Low Voltage Level, X = Irrelevant

HC Logic Symbol

 

HCT Logic Symbol

nA

 

nA

 

 

nB

 

 

 

nY

nB

 

 

nC

 

nY

nD

 

 

 

 

 

nC

 

 

nD

2

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