Texas Instruments CD74HCT193E, CD74HC193M96, CD74HC193M, CD74HC193E, CD74HC192E Datasheet

Data sheet acquired from Harris Semiconductor SCHS163

September 1997

CD74HC192, CD74HC193, CD74HCT193

High Speed CMOS Logic

Presettable Synchronous 4-Bit Up/Down Counters

		Features
		•	Synchronous Counting and Asynchronous
	[ /Title		Loading
		•	Two Outputs for N-Bit Cascading
	(CD74
	HC192	•	Look-Ahead Carry for High-Speed Counting
	,	•	Fanout (Over Temperature Range)
	CD74		- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
	HC193		- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
	,	•	Wide Operating Temperature Range . . . -55oC to 125oC
	CD74	•	Balanced Propagation Delay and Transition Times
	HCT19	•	Significant Power Reduction Compared to LSTTL
	3)		Logic ICs
	/Sub-	• HC Types
	ject		- 2V to 6V Operation
	(High		- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
	Speed		at VCC = 5V
		• HCT Types
	CMOS
			- 4.5V to 5.5V Operation
	Logic
			- Direct LSTTL Input Logic Compatibility,
	Preset-
			VIL= 0.8V (Max), VIH = 2V (Min)
			- CMOS Input Compatibility, Il ≤ 1 A at VOL, VOH

Pinout

CD74HC192, CD74HC193, CD74HCT193

(PDIP, SOIC)

TOP VIEW

P1

1

16 VCC

Q1

2

15

P0

Q0

3

14 MR

CPD

4

13 TCD

CPU

5

12 TCU

Q2

6

11 PL

Q3

7

10

P2

GND

8

9

P3

Description

The Harris CD74HC192, CD74HC193 and CD74HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous counters, respectively.

Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL). The counter is incremented on the low-to-high transition of the Clock-Up input (and a high level on the ClockDown input) and decremented on the low to high transition of the Clock-Down input (and a high level on the Clock-up input). A high level on the MR input overrides any other input to clear the counter to its zero state. The Terminal Count up (carry) goes low half a clock period before the zero count is reached and returns to a high level at the zero count. The Terminal Count Down (borrow) in the count down mode likewise goes low half a clock period before the maximum count (9 in the 192 and 15 in the 193) and returns to high at the maximum count. Cascading is effected by connecting the carry and borrow outputs of a less significant counter to the Clock-Up and CLock-Down inputs, respectively, of the next most significant counter.

If a decade counter is present to an illegal state or assumes an illegal state when power is applied, it will return to the normal sequence in one count as shown in state diagram.

Ordering Information

	TEMP. RANGE		PKG.
PART NUMBER	(oC)	PACKAGE	NO.
CD74HC192E	-55 to 125	16 Ld PDIP	E16.3
CD74HC193E	-55 to 125	16 Ld PDIP	E16.3
CD74HCT193E	-55 to 125	16 Ld PDIP	E16.3
CD74HCT193M	-55 to 125	16 Ld SOIC	M16.15
NOTES:

1.When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

2.Wafer or die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.		File Number 1674.1
Copyright © Harris Corporation 1997	1

CD74HC192, CD74HC193, CD74HCT193

Functional Diagram

BCD/BINARY

PRESET

P0

P1

P2

P3

15

1

10

9

ASYN.

3

PARALLEL

11

Q0

LOAD PL

2

ENABLE

Q1

BCD (192)

MASTER

14

6

BINARY (193)

RESET

Q2

OUTPUTS

5

7

Q3

CLOCK UP

12

TERMINAL

CLOCK DOWN

4

13

COUNT UP

TERMINAL

COUNT DOWN

TRUTH TABLE

	CLOCK		PARALLEL
CLOCK UP	DOWN	RESET	LOAD	FUNCTION
↑	H	L	H	Count Up
H	↑	L	H	Count Down
X	X	H	X	Reset
X	X	L	L	Load Preset Inputs

NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, ↑ = Transition from Low to High Level

2

CD74HC192, CD74HC193, CD74HCT193

Absolute Maximum Ratings

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . .	-0.5V to 7V
DC Input Diode Current, IIK	±20mA
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . .
DC Output Diode Current, IOK	±20mA
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . .
DC Output Source or Sink Current per Output Pin, IO	±25mA
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . .
DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . .	. . . .±50mA

Thermal Information
Thermal Resistance (Typical, Note 3)	θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 160
Maximum Junction Temperature . . . . . . . . . . . . . . . .	. . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .	-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . .	. . . . . . . 300oC
(SOIC - Lead Tips Only)

Operating Conditions

Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC

HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time

2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

3. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specifications

			TEST			25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS
PARAMETER	SYMBOL	VI (V)	IO (mA)	VCC (V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HC TYPES
High Level Input	VIH	-	-	2	1.5	-	-	1.5	-	1.5	-	V
Voltage
				4.5	3.15	-	-	3.15	-	3.15	-	V
				6	4.2	-	-	4.2	-	4.2	-	V
Low Level Input	VIL	-	-	2	-	-	0.5	-	0.5	-	0.5	V
Voltage
				4.5	-	-	1.35	-	1.35	-	1.35	V
				6	-	-	1.8	-	1.8	-	1.8	V
High Level Output	VOH	VIH or	-0.02	2	1.9	-	-	1.9	-	1.9	-	V
Voltage		VIL
			-0.02	4.5	4.4	-	-	4.4	-	4.4	-	V
CMOS Loads
			-0.02	6	5.9	-	-	5.9	-	5.9	-	V
High Level Output			-4	4.5	3.98	-	-	3.84	-	3.7	-	V
Voltage
			-5.2	6	5.48	-	-	5.34	-	5.2	-	V
TTL Loads
Low Level Output	VOL	VIH or	0.02	2	-	-	0.1	-	0.1	-	0.1	V
Voltage		VIL
			0.02	4.5	-	-	0.1	-	0.1	-	0.1	V
CMOS Loads
			0.02	6	-	-	0.1	-	0.1	-	0.1	V
Low Level Output			4	4.5	-	-	0.26	-	0.33	-	0.4	V
Voltage
			5.2	6	-	-	0.26	-	0.33	-	0.4	V
TTL Loads
Input Leakage	II	VCC or	-	6	-	-	±0.1	-	±1	-	±1	µA
Current		GND
Quiescent Device	ICC	VCC or	0	6	-	-	8	-	80	-	160	µA
Current		GND

3

CD74HC192, CD74HC193, CD74HCT193

DC Electrical Specifications		(Continued)
			TEST			25oC		-40oC TO 85oC		-55oC TO 125oC
		CONDITIONS
PARAMETER	SYMBOL	VI (V)	IO (mA)	VCC (V)	MIN	TYP	MAX	MIN	MAX	MIN	MAX	UNITS
HCT TYPES
High Level Input	VIH	-	-	4.5 to	2	-	-	2	-	2	-	V
Voltage				5.5
Low Level Input	VIL	-	-	4.5 to	-	-	0.8	-	0.8	-	0.8	V
Voltage				5.5
High Level Output	VOH	VIH or	-	4.5	4.4	-	-	4.4	-	4.4	-	V
Voltage		VIL
CMOS Loads
High Level Output			-	4.5	3.98	-	-	3.84	-	3.7	-	V
Voltage
TTL Loads
Low Level Output	VOL	VIH or	-	4.5	-	-	0.1	-	0.1	-	0.1	V
Voltage		VIL
CMOS Loads
Low Level Output			-	4.5	-	-	0.26	-	0.33	-	0.4	V
Voltage
TTL Loads
Input Leakage	II	VCC to	-	5.5	-	-	±0.1	-	±1	-	±1	µA
Current		GND
Quiescent Device	ICC	VCC or	-	5.5	-	-	8	-	80	-	160	µA
Current		GND
Additional Quiescent	ICC	VCC	-	4.5 to	-	100	360	-	450	-	490	µA
Device Current Per		-2.1		5.5
Input Pin: 1 Unit Load
(Note 4)
NOTE:

4. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.

HCT Input Loading Table

INPUT			UNIT LOADS
P0-P3			0.4
MR			1.45
			0.85
	PL
CPU, CPD			1.45

NOTE: Unit Load is ICC limit specified in DC Electrical

Specifications table, e.g. 360µA max at 25oC.

4