Texas Instruments CD74HCT154M, CD74HCT154EN, CD74HCT154E, CD74HC154M96, CD74HC154M Datasheet

Data sheet acquired from Harris Semiconductor SCHS152

September 1997

CD74HC154,

CD74HCT154

High Speed CMOS Logic

4-to-16 Line Decoder/Demultiplexer

Features

Description

•

Two Enable Inputs to Facilitate Demultiplexing and

The Harris CD74HC154 and CD74HCT154 are 4-to-16 line

[ /Title

Cascading Functions

decoders/demultiplexers with two enable inputs, E1 and E2.

•

Fanout (Over Temperature Range)

A High on either enable input forces the output into the High

(CD74

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

state. The demultiplexing function is performed by using the

HC154

four input lines, A0 to A3, to select the output lines Y0 to

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

Y15, and using one enable as the data input while holding

,

Wide Operating Temperature Range . . . -55oC to 125oC

•

the other enable low.

CD74

•

Balanced Propagation Delay and Transition Times

Ordering Information

HCT15

4)

•

Significant Power Reduction Compared to LSTTL

PKG.

/Sub-

Logic ICs

TEMP. RANGE (oC)

PART NUMBER

PACKAGE

NO.

ject

• HC Types

CD74HC154E

-55 to 125

24 Ld PDIP

E24.6

(High

- 2V to 6V Operation

Speed

- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at

CD74HCT154E

-55 to 125

24 Ld PDIP

E24.6

CMOS

VCC = 5V

CD74HC154EN

-55 to 125

24 Ld PDIP

E24.3

• HCT Types

Logic

CD74HC154EN

-55 to 125

24 Ld PDIP

E24.3

4-to-16

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

CD74HC154M

-55 to 125

24 Ld SOIC

M24.3

Line

VIL= 0.8V (Max), VIH = 2V (Min)

Decod

CD74HCT154M

-55 to 125

24 Ld SOIC

M24.3

- CMOS Input Compatibility, Il ≤ 1 A at VOL, VOH

er/Dem

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer or d ie for this part number is available which meets all

electrical specifications. Please contact your local sales office or

Harris customer service for ordering information.

Pinout

CD74HC154, CD74HCT154

(PDIP, SOIC)

TOP VIEW

Y0

1

24 VCC

Y1	2	23	A0
Y2	3	22	A1
Y3	4	21	A2

Y4	5	20	A3
Y5	6	19	E2

Y6	7	18	E1
Y7	8	17	Y15

Y8	9	16	Y14
Y9	10	15	Y13
Y10	11	14	Y12

GND 12

13 Y11

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.	File Number 1657.1

Copyright © Harris Corporation 1997

1

CD74HC154, CD74HCT154

Functional Diagram

1

2

Y0

Y1

3

Y2

4

Y3

5

Y4

6

Y5

7

Y6

A0

23

8

Y7

A1

22

9

Y8

A2

21

10

Y9

A3

20

11

Y10

13

Y11

14

Y12

15

Y13

18

16

E1

Y14

19

17

GND = 12

E2

Y15

TRUTH TABLE

VCC = 24

INPUTS

OUTPUTS

A3

A2

A1

E1

E2

A0

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

Y9

Y10

Y11

Y12

Y13

Y14

Y15

L

L

L

L

L

L

L

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

L

L

L

L

L

H

H

L

H

H

H

H

H

H

H

H

H

H

H

H

H

H

L

L

L

L

H

L

H

H

L

H

H

H

H

H

H

H

H

H

H

H

H

H

L

L

L

L

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

H

H

L

L

L

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L

H

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L

H

H

H

H

H

H

H

H

H

H

H

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L

L

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L

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

L

L

L

H

H

L

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

L

L

L

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

L

L

H

L

L

L

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

L

L

L

H

L

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

L

L

H

L

H

L

H

H

H

H

H

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H

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H

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L

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L

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L

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L

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H

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H

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H

H

H

H

H

L

L

H

X

X

X

X

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

L

X

X

X

X

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

X

X

X

X

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

H

NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care

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