Texas Instruments DV2004S1, DV2004L1, BQ2004SNTR, BQ2004SN, BQ2004PN Datasheet

Features

Fast charge and conditioning of nickel cadmium or nickel-metal hydride batteries

Hysteretic PWM switch-mode current regulation or gated control of an external regulator

Easily integrated into systems or used as a stand-alone charger

Pre-charge qualification of temperature and voltage

Configurable, direct LED outputs display battery and charge status

Fast-charge termination by ∆ temperature/∆ time, peak volume detection, -∆V, maximum voltage, maximum temperature, and maximum time

Optional top-off charge and pulsed current maintenance charging

Logic-level controlled low-power mode (< 5 A standby current)

bq2004

General Description

The bq2004 Fast Charge IC provides comprehensive fast charge control functions together with high-speed switching power control circuitry on a monolithic CMOS device.

Integration of closed-loop current control circuitry allows the bq2004 to be the basis of a cost-effective solution for stand-alone and systemintegrated chargers for batteries of one or more cells.

Switch-activated discharge-before- charge allows bq2004-based chargers to support battery conditioning and capacity determination.

High-efficiency power conversion is accomplished using the bq2004 as a hysteretic PWM controller for switch-mode regulation of the charging current. The bq2004 may alternatively be used to gate an externally regulated charging current.

Fast charge may begin on application of the charging supply, replacement

Fast-Charge IC

of the battery, or switch depression. For safety, fast charge is inhibited unless/until the battery temperature and voltage are within configured limits.

Temperature, voltage, and time are monitored throughout fast charge. Fast charge is terminated by any of the following:

Rate of temperature time (∆T/∆t)

Peak voltage detection (PVD)

Negative delta voltage (-∆V)

Maximum voltage

Maximum temperature

Maximum time

After fast charge, optional top-off and pulsed current maintenance phases are available.

Pin Connections

Pin Names

Discharge command

SNS

Sense resistor input

DCMD

DSEL

Display select

LED1

Charge status output 1

1

16

DCMD

INH

VSEL

Voltage termination

LED2

Charge status output 2

DSEL

2

15

DIS

select

VSS

System ground

VSEL

3

14

MOD

TM1

Timer mode select 1

TM1

4

13

VCC

VCC

5.0V ±10% power

TM2

Timer mode select 2

TM2

5

12

VSS

MOD

Charge current control

TCO

Temperature cutoff

TCO

6

11

LED2

DIS

Discharge control

TS

7

10

LED1

TS

Temperature sense

output

BAT

8

9

SNS

BAT

Battery voltage

INH

Charge inhibit input

16-Pin Narrow DIP

or Narrow SOIC

PN2004E01.eps

SLUS063–JUNE 1999 F

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bq2004

Pin Descriptions

DCMD	Discharge-before-charge control input
	The			input controls the conditions
		DCMD
	that enable discharge-before-charge. DCMD
	is pulled up internally. A negative-going
	pulse on		DCMD		initiates a discharge to end-
	of-discharge voltage (EDV) on the BAT pin,
	followed by a new charge cycle start. Tying
	DCMD to ground enables automatic
	discharge-before-charge on every new charge
	cycle start.

DSEL	Display select input
	This three-state input configures the charge
	status display mode of the LED1 and LED2
	outputs. See Table 2.
VSEL	Voltage termination select input

SNS	Charging current sense input
	SNS controls the switching of MOD based on
	an external sense resistor in the current
	path of the battery. SNS is the reference po-
	tential for both the TS and BAT pins. If
	SNS is connected to VSS, then MOD switches
	high at the beginning of charge and low at
	the end of charge.

LED1–	Charge status outputs
LED2	Push-pull outputs indicating charging
	status. See Table 2.
VSS	Ground
VCC	VCC supply input
	5.0V, ±10% power input.
MOD	Charge current control output

	This three-state input controls the voltage-
	termination technique used by the bq2004.
	When high, PVD is active. When floating,
	-∆V is used. When pulled low, both PVD and
	-∆V are disabled.
TM1–	Timer mode inputs
TM2	TM1 and TM2 are three-state inputs that
	configure the fast charge safety timer, voltage
	termination hold-off time, “top-off ”, and
	trickle charge control. See Table 1.
TCO	Temperature cut-off threshold input
	Input to set maximum allowable battery
	temperature. If the potential between TS
	and SNS is less than the voltage at the TCO
	input, then fast charge or top-off charge is ter-
	minated.
TS	Temperature sense input
	Input, referenced to SNS, for an external
	thermister monitoring battery temperature.
BAT	Battery voltage input
	BAT is the battery voltage sense input, refer-
	enced to SNS. This is created by a high-
	impedance resistor-divider network con-
	nected between the positive and the negative
	terminals of the battery.

	MOD is a push-pull output that is used to
	control the charging current to the battery.
	MOD switches high to enable charging cur-
	rent to flow and low to inhibit charging
	current flow.
DIS	Discharge control output
	Push-pull output used to control an external
	transistor to discharge the battery before
	charging.
	Charge inhibit input
INH
	When low, the bq2004 suspends all charge
	actions, drives all outputs to high imped-
	ance, and assumes a low-power operational
	state. When transitioning from low to high, a
	new charge cycle is started.

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bq2004

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a state diagram of the bq2004.

Battery Voltage and Temperature

Measurements

Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BAT, should represent a two-cell potential for the battery under charge. A resistor-divider ratio of:

RB1 = N - 1

RB2 2

is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1.

Discharge-Before-Charge

The DCMD input is used to command discharge-before- charge via the DIS output. Once activated, DIS becomes active (high) until VCELL falls below VEDV, at which time DIS goes low and a new fast charge cycle begins.

The DCMD input is internally pulled up to VCC (its inactive state). Leaving the input unconnected, therefore, results in disabling discharge-before-charge. A negative going pulse on DCMD initiates discharge-before-charge at any time regardless of the current state of the bq2004. If DCMD is tied to VSS, discharge-before-charge will be the first step in all newly started charge cycles.

Starting a Charge Cycle

A new charge cycle (see Figure 2) is started by:

1.VCC rising above 4.5V

2.VCELL falling through the maximum cell voltage, VMCV where:

Note: This resistor-divider network input impedance to end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient thermistor placed in proximity to the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TS is developed using a resistor-thermistor network between VCC and VSS. See Figure 1. Both the BAT and TS inputs are referenced to SNS, so the signals used inside the IC are:

VBAT - VSNS = VCELL

and

VTS - VSNS = VTEMP

VMCV = 0.8 VCC ± 30mV

3.A transition on the INH input from low to high.

If DCMD is tied low, a discharge-before-charge is executed as the first step of the new charge cycle. Otherwise, pre-charge qualification testing is the first step.

The battery must be within the configured temperature and voltage limits before fast charging begins.

The valid battery voltage range is VEDV < VBAT < VMCV where:

VEDV = 0.4 VCC ± 30mV

The valid temperature range is VHTF < VTEMP < VLTF, where:

			Negative Temperature
			Coefficient Thermister
				VCC
				RT1	PACK +
			PACK+
	bq2004	RB1	TS		N
			bq2004	RT2
	BAT				T
					C
		RB2	SNS
	SNS				PACK -
			PACK-

Fg2004a.eps

Figure 1. Voltage and Temperature Monitoring

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bq2004

Dis-

Charge

Fast Charging

Top-Off

Pulse-Trickle

charge

Pending*

(Optional)

(Optional)

(Pulse-Trickle)

DIS

Switch-mode

260 s

260 s

MOD Configuration

2080 s

Note*

or

260 s

260 s

External

MOD Regulation

(SNS Grounded)

2080 s

Note*

Mode 1, LED2 Status Output

Mode 1, LED1 Status Output

Mode 2, LED2 Status Output

Mode 2, LED1 Status Output

Mode 3, LED2 Status Output

Mode 3, LED1 Status Output

Battery within temperature/voltage limits.

Battery discharged to 0.4

* VCC. Battery outside

temperature/voltage limits.

Discharge-Before-Charge started

*See Table 3 for pulse-trickle period.

TD200401a.eps

Figure 2. Charge Cycle Phases

4

bq2004

VLTF = 0.4 VCC ± 30mV

VHTF = [(1/4 VLTF) + (3/4 VTCO)] ± 30mV

Note: The low temperature fault (LTF) threshold is not enforced if the IC is configured for PVD termination (VSEL = high).

VTCO is the voltage presented at the TCO input pin, and is configured by the user with a resistor divider between VCC

and ground. The allowed range is 0.2 to 0.4 VCC.

If the temperature of the battery is out of range, or the voltage is too low, the chip enters the charge pending state and waits for both conditions to fall within their allowed limits. The MOD output is modulated to provide the configured trickle charge rate in the charge pending state. There is no time limit on the charge pending state; the charger remains in this state as long as the voltage or temperature conditons are outside of the allowed limits. If the voltage is too high, the chip goes to the battery absent state and waits until a new charge cycle is started.

Fast charge continues until termination by one or more of the six possible termination conditions:

Delta temperature/delta time (∆T/∆t)

Peak voltage detection (PVD)

Negative delta voltage (-∆V)

Maximum voltage

Maximum temperature

Maximum time

PVD and -∆V Termination

The bq2004 samples the voltage at the BAT pin once

every 34s. When -∆V termination is selected, if VCELL is lower than any previously measured value by 12mV

±4mV (6mV/cell), fast charge is terminated. When PVD termination is selected, if VCELL is lower than any previously measured value by 6mV ±2mV (3mV/cell), fast charge is terminated. The PVD and -∆V tests are valid in the range 0.4 VCC < VCELL < 0.8 VCC.

VSEL Input	Voltage Termination
Low	Disabled
Float	-∆V
High	PVD

Voltage Sampling

Each sample is an average of voltage measurements taken 57 s apart. The IC takes 32 measurements in PVD mode and 16 measurements in -∆V mode. The re-

sulting sample periods (9.17ms and 18.18ms, respectively) filter out harmonics centered around 55Hz and 109Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from

either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging. During the hold-off period, -∆V termination is disabled. This avoids premature termination on the voltage

spikes sometimes produced by older batteries when fast-charge current is first applied. ∆T/∆t, maximum

voltage and maximum temperature terminations are not affected by the hold-off period.

∆T/∆t Termination

The bq2004 samples at the voltage at the TS pin every 34s, and compares it to the value measured two samples earlier. If VTEMP has fallen 16mV ±4mV or more, fast charge is terminated. If VSEL = high, the ∆T/∆t termi-

nation test is valid only when VTCO < VTEMP < VTCO + 0.2 VCC. Otherwise the ∆T/∆t termination test is valid

only when VTCO < VTEMP < VLTF.

Temperature Sampling

Each sample is an average of 16 voltage measurements taken 57 s apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that

may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime VCELL rises above VMCV, the LEDs go off and

charging ceases immediately. If VCELL then falls back below VMCV before tMCV = 1.5s ±0.5s, the chip transitions to

the Charge Complete state (maximum voltage termination). If VCELL remains above VMCV at the expiration of tMCV, the bq2004 transitions to the Battery Absent state (battery removal). See Figure 4.

Maximum temperature termination occurs anytime VTEMP falls below the temperature cutoff threshold VTCO. Unless PVD termination is enabled (VSEL = high), charge will also be terminated if VTEMP rises above the low temperature fault threshold, VLTF, after fast charge begins. The VLTF threshold is not enforced when the IC is configured for PVD termination.

Maximum charge time is configured using the TM pin. Time settings are available for corresponding charge rates of C/4, C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and enforced again on the top-off phase, if selected. There is no time limit on the trickle-charge phase.

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