Texas Instruments DV2005S1, DV2005L1, BQ2005S, BQ2005PN, BQ2005STR Datasheet

Features

Sequential fast charge and conditioning of two NiCd or NiMH nickel cadmium or nickel-metal hydride battery packs

Hysteretic PWM switch-mode current regulation or gated control of an external regulator

Easily integrated into systems or used as a stand-alone charger

Pre-charge qualification of temperature and voltage

Direct LED outputs display battery and charge status

Fast-charge termination by

∆ temperature/∆ time, -∆V, maximum voltage, maximum temperature, and maximum time

Optional top-off and pulsetrickle charging

bq2005

Fast-Charge IC for Dual-Battery Packs

General Description

The bq2005 Fast-Charge IC provides comprehensive fast charge control functions together with high-speed switching power control circuitry on a monolithic CMOS device for sequential charge management in dual battery pack applications.

Integration of closed-loop current control circuitry allows the bq2005 to be the basis of a cost-effective solution for stand-alone and systemintegrated chargers for batteries of one or more cells.

Switch-activated discharge-before- charge allows bq2005-based chargers to support battery conditioning and capacity determination.

High-efficiency power conversion is accomplished using the bq2005 as a hysteretic PWM controller for switch-mode regulation of the charging current. The bq2005 may alterna-

tively be used to gate an externally regulated charging current.

Fast charge may begin on application of the charging supply, replacement of the battery, or switch depression. For safety, fast charge is inhibited unless/until the battery temperature and voltage are within configured limits.

Temperature, voltage, and time are monitored throughout fast charge. Fast charge is terminated by any of the following:

Rate of temperature rise (∆T/∆t)

Negative delta voltage (-∆V)

Maximum voltage

Maximum temperature

Maximum time

After fast charge, optional top-off and pulsed current maintenance phases are available.

Pin Connections

DCMDA	1	20		FCCB
DVEN	2	19
				CHB
TM1	3	18		MODB
TM2	4	17		MODA
TCO	5	16		VCC
TSA	6	15		VSS
TSB	7	14		FCC		A
BATA	8	13		CH	A
BATB	9	12		DISA
SNSA	10	11		SNSB

20-Pin DIP or SOIC

PN200501.eps

SLUS079–JUNE 1999 F

Pin Names

	DCMDA		Discharge command input,	DISA				Discharge control output,
			battery A					battery A
	DVEN		-∆V enable
				CHA,				Charge status output,
				CHB				battery A/B
	TM1		Timer mode select 1
				FCCA,				Fast charge complete output,
	TM2		Timer mode select 2
				FCCB				battery A/B
	TCO		Temperature cut-off	VSS				System ground
	TSA,		Temperature sense input,	VCC				5.0V ±10% power
	TSB		battery A/B
				MODA, Charge current control
	BATA,		Battery voltage input,	MODB				output, battery A/B
	BATB		battery A/B
	SNSA,		Sense resistor input ,
	SNSB		battery A/B

1

bq2005

Pin Descriptions

DCMDA	Discharge-before-charge control input,
	battery A
		A controls the discharge-before-charge
	DCMD
	function of the bq2005. A negative-going
	pulse on DCMDA initiates a discharge to
	EDV followed by a charge if conditions allow.
	By tying DCMDA to ground, automatic
	discharge-before-charge is enabled on every
	new charge cycle start.
DVEN	-∆V enable input
	This input enales/disables -∆V charge termina-
	tion. If DVEN is high, the -∆V test is enabled.
	If DVEN is low, -∆V test is disabled. The state
	of DVEN may be changed at any time.
TM1–	Timer mode inputs
TM2	TM1 and TM2 are three-state inputs that con-
	figure the fast charge safety timer, -∆V hold-
	off time, and that enhance/disable top-off.
	See Table 2.
TCO	Temperature cutoff threshold input
	Input to set maximum allowable battery
	temperature. If the potential between TSA
	and SNSA or TSB and SNSB is less than the
	voltage at the TCO input, then fast charge or
	top-off charge is terminated for the corre-
	sponding battery pack.
TSA,	Temperature sense inputs
TSB	Input, referenced to SNSA or SNSB, respec-
	tively, for an external thermistor monitoring
	battery temperature.
BATA,	Voltage inputs
BATB	The battery voltage sense input, referenced to
	SNSA,B, respectively. This is created by a
	high-impedance resistor divider network con-
	nected between the positive and the negative
	terminals of the battery.
SNSA,	Charging current sense inputs,
SNSB	SNSA,B controls the switching of MODA,B
	based on the voltage across an external
	sense resistor in the current path of the bat-
	tery. SNS is the reference potential for the
	TS and BAT pins. If SNS is connected to
	VSS, MOD switches high at the beginning of
	charge and low at the end of charge.

DISA	Discharge control output
	Push-pull output used to control an external
	transistor to discharge battery A before
	charging.

CHA, Charge status outputs

CHB

Push-pull outputs indicating charging status for batteries A and B, respectively. See Figure 1 and Table 2.

FCCA, Fast charge complete outputs

FCCB

Open-drain outputs indicating fast charge complete for batteries A and B, respectively. See Figure 1 and Table 2.

MODA, Charge current control outputs MODB

	MODA,B is a push-pull output that is used to
	control the charging current to the battery.
	MODA,B switches high to enable charging
	current to flow and low to inhibit charging
	current flow to batteries A and B,
	respectively.
VCC	VCC supply input
	5.0 V, ±10% power input.
Vss	Ground

2

bq2005

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a state diagram of the bq2005.

Battery Voltage and Temperature

Measurements

Discharge-Before-Charge

The DCMDA input is used to command discharge- before-charge via the DISA output. Once activated, DISA becomes active (high) until VCELL falls below VEDV where:

VEDV = 0.475 VCC ± 30mV

Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BATA,B, must be divided down to between 0.95 VCC and 0.475 VCC for proper operation. A resistor-divider ratio of:

	RB1	=	N	− 1
	RB2		2.375

is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1.

Note: This resistor-divider network input impedance to end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient thermistor placed in proximity to the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TSA,B is developed using a resistor-thermistor network between VCC and VSS. See Figure 1. Both the BATA,B and TSA,B inputs are referenced to SNSA,B, so the signals used inside the IC are:

VBAT(A,B) - VSNS(A,B) = VCELL(A,B)

at which time DISA goes low and a new fast charge cycle begins.

The DCMDA input is internally pulled up to VCC (its inactive state). Leaving the input unconnected, therefore, results in disabling discharge-before-charge. A negative going pulse on DCMDA initiates discharge-before-charge at any time regardless of the current state of the bq2005. If DCMDA is tied to VSS, discharge-before- charge will be the first step in all newly started charge cycles.

Starting A Charge Cycle

A new charge cycle is started by (see Figure 2):

1.VCC rising above 4.5V

2.VCELL falling through the maximum cell voltage, VMCV where:

VMCV = 0.95 VCC ± 30mV

If DCMDA is tied low, a discharge-before-charge will be executed as the first step of the new charge cycle. Otherwise, pre-charge qualification testing will be the first step.

The battery must be within the configured temperature

		and	and voltage limits before fast charging begins.
	VTS(A,B) - VSNS(A,B) = VTEMP(A,B)
			Negative Temperature
			Coefficient Thermister
				VCC
				RT1	PACK +
			PACK+
	bq2005	RB1	TSA,B		N
			bq2005	RT2
	BATA,B				T
					C
		RB2	SNSA,B
	SNSA,B				PACK -
			PACK-

Fg2005-1.eps

Figure 1. Voltage and Temperature Monitoring

3

bq2005

The valid battery voltage range is VEDV < VBAT < VMCV. The valid temperature range is VHTF < VTEMP < VLTF, where:

VLTF = 0.4 VCC ± 30mV

VHTF = [(1/4 VLTF) + (3/4 VTCO)] ± 30mV

VTCO is the voltage presented at the TCO input pin, and is configured by the user with a resistor divider between VCC

and ground. The allowed range is 0.2 to 0.4 VCC.

If the temperature of the battery is out of range, or the voltage is too low, the chip enters the charge pending state and waits for both conditions to fall within their allowed limits. The MODA,B output is modulated to provide the configured trickle charge rate in the charge pending state. There is no time limit on the charge

pending state; the charger remains in this state as long as the voltage or temperature conditons are outside of the allowed limits. If the voltage is too high, the chip goes to the battery absent state and waits until a new charge cycle is started.

Fast charge continues until termination by one or more of the five possible termination conditions:

Delta temperature/delta time (∆T/∆t)

Negative delta voltage (-∆V)

Maximum voltage

Maximum temperature

Maximum time

Dis-

Charge

Fast Charging

Top-Off

Pulse-Trickle

charge

Pending*

(Optional)

(Optional

(Pulse-Trickle)

Battery A)

DISA

MODA,B

Switch-mode

4s

260 s

Configuration

34s

Note*

or

External

4s

260 s

MODA,B

Regulation

34s

Note*

CH

A,B Status Output

Status Output

FCC

A,B

Battery within temperature/voltage limits.

Battery discharged to 0.475

* VCC. Battery outside

temperature/voltage limits.

Discharge-Before-Charge started

*See Table 3 for pulse-trickle period.

T200501.eps

Figure 2. Charge Cycle Phases

4

						bq2005
	Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table
				Typical Fast-Charge	Typical -∆V/MCV
	Corresponding			and Top-Off	Hold-Off		Top-Off
Fast-Charge Rate		TM1	TM2	Time Limits	Time (seconds)		Rate
	C/4	Low	Low	360	137		Disabled
	C/2	Float	Low	180	820		Disabled
	1C	High	Low	90	410		Disabled
	2C	Low	Float	45	200		Disabled
	4C	Float	Float	23	100		Disabled
	C/2	High	Float	180	820		C/16
	1C	Low	High	90	410		C/8
	2C	Float	High	45	200		C/4
	4C	High	High	23	100		C/2
Note:	Typical conditions = 25°C, VCC = 5.0V.

-∆V Termination

If the DVEN input is high, the bq2005 samples the voltage at the BAT pin once every 34s. If VCELL is lower than any previously measured value by 12mV ±4mV, fast charge is terminated. The -∆V test is valid in the range VMCV - (0.2 VCC) < VCELL < VMCV.

Voltage Sampling

Each sample is an average of 16 voltage measurements taken 57 s apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that

may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging. During the hold-off period, -∆V termination is disabled. This avoids premature termination on the voltage spikes

sometimes produced by older batteries when fast-charge current is first applied. ∆T/∆t, maximum voltage and

maximum temperature terminations are not affected by the hold-off period.

∆T/∆t Termination

The bq2005 samples at the voltage at the TS pin every 34s, and compares it to the value measured two samples earlier. If VTEMP has fallen 16mV ±4mV or more, fast charge is terminated. The ∆T/∆t termination test is valid only when VTCO < VTEMP < VLTF.

Temperature Sampling

Each sample is an average of 16 voltage measurements taken 57 s apart. The resulting sample period (18.18ms) filters out harmonics around 55Hz. This technique minimizes the effect of any AC line ripple that

may feed through the power supply from either 50Hz or 60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime VCELL rises above VMCV, CHG goes high (the LED goes off) immediately. If the bq2005 is not in the voltage hold-off period, fast charging also ceases immediately. If VCELL then falls back below VMCV before tMCV = 1s (maximum), the chip transitions to the Charge Complete state (maximum voltage termination). If VCELL remains above VMCV at the expiration of tMCV, the bq2005 transitions to the Battery Absent state (battery removal). See Figure 4.

Maximum temperature termination occurs anytime the voltage on the TS pin falls below the temperature cut-off threshold VTCO. Charge will also be terminated if VTEMP rises above the minimum temperature fault threshold, VLTF, after fast charge begins.

Maximum charge time is configured using the TM pin. Time settings are available for corresponding charge rates of C/4, C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and enforced again on the top-off phase, if selected. There is no time limit on the trickle-charge phase.

Top-off Charge

An optional top-off charge phase may be selected to follow fast charge termination for the C/2 through 4C rates. This phase may be necessary on NiMH or other

5