Texas Instruments CD74FCT541SM, CD74FCT541M96, CD74FCT541M, CD74FCT541E, CD74FCT540M96 Datasheet
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Data sheet acquired from Harris Semiconductor
SCHS257
January 1997 |
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RECOMMENDED |
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DESIGNS |
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CMOS |
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•Buffered Inputs
•Typical Propagation Delay: 6.4ns at VCC = 5V, TA = 25oC, CL = 50pF
•CD74FCT540
-Inverting
•CD74FCT541
-Noninverting
•SCR Latchup Resistant BiCMOS Process and Circuit Design
•Speed of Bipolar FAST™/AS/S
•64mA Output Sink Current
•Output Voltage Swing Limited to 3.7V at VCC = 5V
•Controlled Output Edge Rates
•Input/Output Isolation to VCC
•BiCMOS Technology with Low Quiescent Power
CD74FCT540,
CD74FCT541
BiCMOS FCT Interface Logic,
Octal Buffers/Line Drivers, Three-State
Description
The CD74FCT540 and CD74FCT541 octal buffers/line drivers use a small geometry BiCMOS technology. The output stage is a combination of bipolar and CMOS transistors that limits the output HIGH level to two diode drops below VCC. This resultant lowering of output swing (0V to 3.7V) reduces power bus ringing (a source of EMI) and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 milliamperes.
The CD74FCT540 is a three-state buffer having two active LOW output enables. The CD74FCT541 is a noninverting three state buffer having two active LOW output enables.
Ordering Information
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TEMP. |
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PKG. |
PART NUMBER |
RANGE (oC) |
PACKAGE |
NO. |
CD74FCT540E |
0 to 70 |
20 Ld PDIP |
E20.3 |
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CD74FCT541E |
0 to 70 |
20 Ld PDIP |
E20.3 |
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CD74FCT540M |
0 to 70 |
20 Ld SOIC |
M20.3 |
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CD74FCT541M |
0 to 70 |
20 Ld SOIC |
M20.3 |
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CD74FCT541SM |
0 to 70 |
20 Ld SSOP |
M20.209 |
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NOTE: When ordering the suffix M and SM packages, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.
Pinouts
CD74FCT540 |
CD74FCT541 |
(PDIP, SOIC) |
(PDIP, SOIC, SSOP) |
TOP VIEW |
TOP VIEW |
OE1 |
1 |
20 VCC |
A0 |
2 |
19 OE2 |
A1 |
3 |
18 |
Y0 |
A2 |
4 |
17 |
Y1 |
A3 |
5 |
16 |
Y2 |
A4 |
6 |
15 |
Y3 |
A5 |
7 |
14 |
Y4 |
A6 |
8 |
13 |
Y5 |
A7 |
9 |
12 |
Y6 |
GND |
10 |
11 Y7 |
OE1 |
1 |
20 VCC |
A0 |
2 |
19 OE2 |
A1 |
3 |
18 |
Y0 |
A2 |
4 |
17 |
Y1 |
A3 |
5 |
16 |
Y2 |
A4 |
6 |
15 |
Y3 |
A5 |
7 |
14 |
Y4 |
A6 |
8 |
13 |
Y5 |
A7 |
9 |
12 |
Y6 |
GND |
10 |
11 Y7 |
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. |
File Number 2383.2 |
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FAST™ is a trademark of Fairchild Semiconductor. |
8-1 |
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Copyright © Harris Corporation 1997 |
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CD74FCT540, CD74FCT541
Functional Diagram
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2 |
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18 |
541 |
540 |
A0 |
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Y0 |
Y0 |
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3 |
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17 |
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A1 |
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Y1 |
Y1 |
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4 |
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16 |
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A2 |
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Y2 |
Y2 |
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5 |
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15 |
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A3 |
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Y3 |
Y3 |
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6 |
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14 |
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A0 |
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Y4 |
Y4 |
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7 |
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13 |
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A1 |
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Y5 |
Y5 |
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8 |
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12 |
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A2 |
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Y6 |
Y6 |
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9 |
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11 |
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A3 |
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Y7 |
Y7 |
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1 |
19 |
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OE1 |
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GND = PIN 10 |
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OE2 |
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VCC = PIN 20 |
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TRUTH TABLE (Note 1)
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INPUTS |
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OUTPUTS |
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An |
CD74FCT540 |
CD74FCT541 |
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OE1 |
OE2 |
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L |
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L |
H |
L |
H |
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H |
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X |
X |
Z |
Z |
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X |
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H |
X |
Z |
Z |
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L |
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L |
L |
H |
L |
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NOTE:
1.H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Z = HIGH Impedance
IEC Logic Symbol
CD74FCT540 |
CD74FCT541 |
1 |
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19 |
EN |
2 |
18 |
3 |
17 |
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4 |
16 |
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5 |
15 |
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6 |
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14 |
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7 |
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13 |
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12 |
8 |
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9 |
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11 |
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1 |
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19 |
EN |
2 |
18 |
3 |
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17 |
4 |
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16 |
5 |
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15 |
6 |
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14 |
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7 |
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13 |
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8 |
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12 |
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8-2
CD74FCT540, CD74FCT541
Absolute Maximum Ratings
DC Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V DC Input Diode Current, IIK (For VI < -0.5V) . . . . . . . . . . . . . -20mA DC Output Diode Current, IOK (for VO < -0.5V) . . . . . . . . . . . -50mA
DC Output Sink Current per Output Pin, IO . . . . . . . . . . . . . . . 70mA DC Output Source Current per Output Pin, IO . . . . . . . . . . . . -30mA
DC VCC Current (ICC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140mA DC Ground Current (IGND). . . . . . . . . . . . . . . . . . . . . . . . . . . 528mA
Thermal Information |
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Thermal Resistance (Typical, Note 2) |
θJA (oC/W) |
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 135 |
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 125 |
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 130 |
Maximum Junction Temperature . . . . . . . . . . . . . . . . |
. . . . . . . 150oC |
Maximum Storage Temperature Range . . . . . . . . . . |
-65oC to 150oC |
Maximum Lead Temperature (Soldering 10s) . . . . . . |
. . . . . . . 300oC |
(SOIC and SSOP-Lead Tips Only) |
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Operating Conditions
Operating Temperature Range (TA) . . . . . . . . . . . . . . . .0oC to 70oC
Supply Voltage Range, VCC . . . . . . . . . . . . . . . . . . . .4.75V to 5.25V
DC Input Voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC
DC Output Voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to ≤ VCC
Input Rise and Fall Slew Rate, dt/dv. . . . . . . . . . . . . . . . 0 to 10ns/V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications |
Commercial Temperature Range 0oC to 70oC, V |
CC |
Max = 5.25V, V |
CC |
Min = 4.75V (Note 5) |
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AMBIENT TEMPERATURE (TA) |
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TEST CONDITIONS |
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25oC |
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0oC TO 70oC |
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PARAMETER |
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SYMBOL |
VI (V) |
IO (mA) |
VCC (V) |
MIN |
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MAX |
MIN |
MAX |
UNITS |
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High Level Input Voltage |
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VIH |
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4.75 to 5.25 |
2 |
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- |
2 |
- |
V |
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Low Level Input Voltage |
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VIL |
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4.75 to 5.25 |
- |
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0.8 |
- |
0.8 |
V |
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High Level Output Voltage |
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VOH |
VIH or VIL |
-15 |
Min |
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2.4 |
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- |
2.4 |
- |
V |
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Low Level Output Voltage |
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VOL |
VIH or VIL |
64 |
Min |
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- |
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0.55 |
- |
0.55 |
V |
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High Level Input Current |
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IIH |
VCC |
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Max |
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- |
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0.1 |
- |
1 |
μA |
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Low Level Input Current |
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IIL |
GND |
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Max |
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- |
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-0.1 |
- |
-1 |
μA |
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Three State Leakage Current |
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IOZH |
VCC |
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Max |
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- |
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0.5 |
- |
10 |
μA |
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IOZL |
GND |
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Max |
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- |
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-0.5 |
- |
-10 |
μA |
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Input Clamp Voltage |
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VIK |
VCC or |
-18 |
Min |
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-1.2 |
- |
-1.2 |
V |
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GND |
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Short Circuit Output Current |
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IOS |
VO = 0 |
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Max |
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-60 |
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- |
-60 |
- |
mA |
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(Note 3) |
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VCC or |
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GND |
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Quiescent Supply Current, |
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ICC |
VCC or |
0 |
Max |
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- |
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8 |
- |
80 |
μA |
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MSI |
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GND |
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Additional Quiescent Supply |
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ICC |
3.4V |
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Max |
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- |
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1.6 |
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1.6 |
mA |
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Current per Input Pin |
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(Note 4) |
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TTL Inputs High, 1 Unit Load |
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NOTES: |
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3.Not more than one output should be shorted at one time. Test duration should not exceed 100ms.
4.Inputs that are not measured are at VCC or GND.
5. FCT Input Loading: All inputs are 1 unit load. Unit load is ICC limit specified in Static Characteristics Chart, e.g., 1.6mA Max. @ 70oC.
8-3
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