MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8 Bit Shift Register
The MC10E/100E141 is an 8-bit full-function shift register. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0 ± D7 accept parallel input data, while DL/DR accept serial input data for left/right shifting. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated.
•700MHz Min. Shift Frequency
•8-Bit
•Full-Function, Bi-Directional
•Asynchronous Master Reset
•Pin-Compatible with E241
•Extended 100E VEE Range of ± 4.2V to ± 5.46V
•75kΩ Input Pulldown Resistors
The select pins, SEL0 and SEL1, select one of four modes of operation: Load, Hold, Shift Left, Shift Right, according to the Function Table.
Input data is accepted a set-up time before the positive clock edge. A HIGH on the Master Reset (MR) pin asynchronously resets all the registers to zero.
Pinout: 28-Lead PLCC (Top View)
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SEL0 |
DL |
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D7 |
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D6 |
D5 |
VCCO |
Q7 |
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25 |
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24 |
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22 |
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20 |
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SEL1 |
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26 |
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18 |
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Q6 |
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CLK |
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27 |
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17 |
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Q5 |
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MR |
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28 |
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16 |
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VCC |
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VEE |
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1 |
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15 |
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NC |
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DR |
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2 |
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14 |
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VCCO |
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D0 |
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3 |
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13 |
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Q4 |
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D1 |
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4 |
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12 |
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Q3 |
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5 |
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11 |
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D2 |
D3 |
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D4 |
VCCO |
Q0 |
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Q1 |
Q2 |
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* All VCC and VCCO pins are tied together on the die. |
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EXPANDED FUNCTION TABLE
MC10E141
MC100E141
8-BIT SHIFT REGISTER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
FUNCTION TABLE
SEL0 |
SEL1 |
Function |
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L |
L |
Load |
L |
H |
Shift Right (Dn to Dn+1) |
H |
L |
Shift Left (Dn to Dn ±1) |
H |
H |
Hold |
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PIN NAMES
Pin |
Function |
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D0 ± D7 |
Parallel Data Inputs |
DL, DR |
Serial Data Inputs |
SEL0, SEL1 |
Mode Select In Inputs |
CLK |
Clock |
Q0 ± Q7 |
Data Outputs |
MR |
Master Reset |
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Function |
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DL |
DR |
SEL0 |
SEL1 |
MR |
CLK |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
Q6 |
Q7 |
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Load |
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X |
X |
L |
L |
L |
Z |
D0 |
D1 |
D2 |
D3 |
D4 |
D5 |
D6 |
D7 |
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Shift Right |
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X |
L |
L |
H |
L |
Z |
L |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
Q6 |
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X |
H |
L |
H |
L |
Z |
H |
L |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
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Shift Left |
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L |
X |
H |
L |
L |
Z |
L |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
L |
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H |
X |
H |
L |
L |
Z |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
L |
H |
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Hold |
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X |
X |
H |
H |
L |
Z |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
L |
H |
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X |
X |
H |
H |
L |
Z |
Q0 |
Q1 |
Q2 |
Q3 |
Q4 |
Q5 |
L |
H |
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Reset |
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X |
X |
X |
X |
H |
X |
L |
L |
L |
L |
L |
L |
L |
L |
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7/96 |
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Motorola, Inc. 1996 |
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REV 3 |
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MC10E141 MC100E141
LOGIC DIAGRAM
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BITS 1 ± 6 |
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DL |
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D |
Q |
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D |
Q |
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D |
Q |
DR |
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R |
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R |
D7 |
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R |
D |
Q0 |
D |
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Q |
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Q7 |
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0 |
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SEL1
SEL0
CLK 
MR
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
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0°C |
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25°C |
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85°C |
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Symbol |
Characteristic |
min typ |
max |
min |
typ |
max |
min |
typ |
max |
Unit |
Condition |
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IIH |
Input HIGH Current |
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150 |
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150 |
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150 |
μA |
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IEE |
Power Supply Current |
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mA |
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10E |
131 |
181 |
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131 |
181 |
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131 |
181 |
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100E |
131 |
181 |
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131 |
181 |
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151 |
181 |
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AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
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0°C |
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25°C |
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85°C |
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Symbol |
Characteristic |
min |
typ |
max |
min |
typ |
max |
min |
typ |
max |
Unit |
Condition |
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fSHIFT |
Max. Shift Frequency |
700 |
900 |
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700 |
900 |
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700 |
900 |
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MH |
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z |
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tPLH |
Propagation Delay To Output |
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ps |
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tPHL |
Clk |
625 |
750 |
975 |
625 |
750 |
975 |
625 |
750 |
975 |
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MR |
600 |
725 |
975 |
600 |
725 |
975 |
600 |
725 |
975 |
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ts |
Setup Time |
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ps |
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D |
175 |
25 |
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175 |
25 |
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175 |
25 |
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SEL0 |
350 |
200 |
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350 |
200 |
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350 |
200 |
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SEL1 |
300 |
150 |
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300 |
150 |
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300 |
150 |
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th |
Hold Time |
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ps |
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D |
200 |
± 25 |
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200 |
± 25 |
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200 |
± 25 |
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SEL0 |
100 |
± 200 |
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100 |
± 200 |
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100 |
± 200 |
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SEL1 |
100 |
±150 |
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100 |
±150 |
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100 |
±150 |
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tRR |
Reset Recovery Time |
900 |
700 |
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900 |
700 |
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900 |
700 |
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ps |
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tPW |
Minimum Pulse Width |
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ps |
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Clk, MR |
400 |
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400 |
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400 |
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tSKEW |
Within-Device Skew |
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60 |
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60 |
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60 |
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ps |
1 |
tr |
Rise/Fall Times |
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ps |
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tf |
20 - 80% |
300 |
525 |
800 |
300 |
525 |
800 |
300 |
525 |
800 |
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1. Within-device skew is defined as identical transitions on similar paths through a device.
MOTOROLA |
2±2 |
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