MOTOROLA MC10107P, MC10107FN, MC10107FNR2 Datasheet

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MOTOROLA MC10107P, MC10107FN, MC10107FNR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Triple 2-Input Exclusive OR/

Exclusive NOR Gate

The MC10107 is a triple±2 input exclusive OR/NOR gate.

PD = 40 mW typ/gate (No Load)

tpd = 2.8 ns typ

tr, tf = 2.5 ns typ (20%±80%)

 

LOGIC DIAGRAM

4

2

5

3

9

11

7

10

14

12

15

13

 

3 = (4 5) + (4 5)

 

2 = (4 5) + (4 5)

VCC1

= PIN 1

VCC2

= PIN 16

VEE

= PIN 8

MC10107

L SUFFIX

CERAMIC PACKAGE

CASE 620±10

P SUFFIX

PLASTIC PACKAGE

CASE 648±08

FN SUFFIX

PLCC

CASE 775±02

DIP

PIN ASSIGNMENT

VCC1

 

1

 

16

 

VCC2

 

 

 

 

 

 

 

 

 

 

CIN

AOUT

 

2

 

15

 

 

 

 

AOUT

 

3

 

14

 

CIN

 

 

 

AIN

 

4

 

13

 

COUT

 

 

 

 

 

 

 

 

 

 

 

 

AIN

 

5

 

12

 

COUT

 

 

 

 

 

 

 

 

 

 

 

 

*NC

 

6

 

11

 

BOUT

 

 

 

BIN

 

7

 

10

 

BOUT

 

 

 

VEE

 

8

 

9

 

BIN

 

 

 

 

 

 

 

 

 

 

 

 

*NC = No Connection

Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).

3/93

Motorola, Inc. 1996

3±30

REV 5

MC10107

ELECTRICAL CHARACTERISTICS

 

 

 

 

 

 

 

Test Limits

 

 

 

 

 

 

 

Pin

 

 

 

 

 

 

 

 

 

 

 

 

 

±30°C

 

 

+25°C

 

+85°C

 

 

 

 

Under

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Characteristic

Symbol

Test

Min

Max

Min

 

Typ

 

Max

Min

Max

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

Power Supply Drain Current

IE

8

 

31

 

 

 

 

28

 

31

mAdc

Input Current

 

IinH

4, 9, 14

 

425

 

 

 

 

265

 

265

μAdc

 

 

 

5, 7, 15

 

350

 

 

 

 

220

 

220

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IinL

*

0.5

 

0.5

 

 

 

 

0.3

 

μAdc

Output Voltage

Logic 1

VOH

2

±1.060

±0.890

±0.960

 

 

 

±0.810

±0.890

±0.700

Vdc

 

 

 

2

±1.060

±0.890

±0.960

 

 

 

±0.810

±0.890

±0.700

 

 

 

 

3

±1.060

±0.890

±0.960

 

 

 

±0.810

±0.890

±0.700

 

 

 

 

3

±1.060

±0.890

±0.960

 

 

 

±0.810

±0.890

±0.700

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Voltage

Logic 0

VOL

2

±1.890

±1.675

±1.850

 

 

 

±1.650

±1.825

±1.615

Vdc

 

 

 

2

±1.890

±1.675

±1.850

 

 

 

±1.650

±1.825

±1.615

 

 

 

 

3

±1.890

±1.675

±1.850

 

 

 

±1.650

±1.825

±1.615

 

 

 

 

3

±1.890

±1.675

±1.850

 

 

 

±1.650

±1.825

±1.615

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Threshold Voltage

Logic 1

VOHA

2

±1.080

 

±0.980

 

 

 

 

±0.910

 

Vdc

 

 

 

2

±1.080

 

±0.980

 

 

 

 

±0.910

 

 

 

 

 

3

±1.080

 

±0.980

 

 

 

 

±0.910

 

 

 

 

 

3

±1.080

 

±0.980

 

 

 

 

±0.910

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Threshold Voltage

Logic 0

VOLA

2

 

±1.655

 

 

 

 

±1.630

 

±1.595

Vdc

 

 

 

2

 

±1.655

 

 

 

 

±1.630

 

±1.595

 

 

 

 

3

 

±1.655

 

 

 

 

±1.630

 

±1.595

 

 

 

 

3

 

±1.655

 

 

 

 

±1.630

 

±1.595

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Switching Times

(50Ω Load)

 

 

 

 

Min

 

Typ

 

Max

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

Propagation Delay

t++

Inputs

±1.1

3.8

1.1

 

2.0

 

3.7

1.1

4.0

 

 

 

t+ ±

4,9 or 14

1.1

3.8

1.1

 

2.0

 

3.7

1.1

4.0

 

 

 

t±+

to either

1.1

3.8

1.1

 

2.0

 

3.7

1.1

4.0

 

 

 

t± ±

Output

1.1

3.8

1.1

 

2.0

 

3.7

1.1

4.0

 

 

 

t++

Inputs

1.1

3.8

1.1

 

2.8

 

3.7

1.1

4.0

 

 

 

t+ ±

5,7 or 15

1.1

3.8

1.1

 

2.8

 

3.7

1.1

4.0

 

 

 

t±+

to either

1.1

3.8

1.1

 

2.8

 

3.7

1.1

4.0

 

 

 

t± ±

Output

1.1

3.8

1.1

 

2.8

 

3.7

1.1

4.0

 

Rise Time

(20 to 80%)

t+

**

1.1

3.5

1.1

 

2.5

 

3.5

1.1

3.8

 

Fall Time

(20 to 80%)

**

1.1

3.5

1.1

 

2.5

 

3.5

1.1

3.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*Individually test each input applying VIH or VIL to input under test.

**Any Output.

MECL Data

3±31

MOTOROLA

DL122 Ð Rev 6

 

 

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