MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 3-Input/3-Output NOR
Gate
The MC10111 is designed to drive up to three transmission lines simul± taneously. The multiple outputs of this device also allow the wire ªORº±ing of several levels of gating for minimization of gate and package count.
The ability to control three parallel lines from a single point makes the MC10111 particularly useful in clock distribution applications where minimum clock skew is desired. Three VCC pins are provided and each one should be used.
PD = 80 mW typ/gate (No Load)
tpd = 2.4 ns typ (All Outputs Loaded) tr, tf = 2.2 ns typ (20%±80%)
LOGIC DIAGRAM
2
3
5
6 4
7
12
13
9
10 14
11
VCC1 = PIN 1,15
VCC2 = PIN 16
VEE = PIN 8
MC10111
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
DIP
PIN ASSIGNMENT
VCC1 |
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1 |
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16 |
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VCC2 |
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VCC1 |
AOUT |
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2 |
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15 |
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AOUT |
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3 |
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14 |
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BOUT |
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AOUT |
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4 |
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13 |
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BOUT |
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AIN |
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5 |
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12 |
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BOUT |
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AIN |
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6 |
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11 |
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BIN |
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AIN |
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7 |
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10 |
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BIN |
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VEE |
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8 |
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9 |
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BIN |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).
9/96
Motorola, Inc. 1996 |
3±44 |
REV 6 |
MC10111
ELECTRICAL CHARACTERISTICS
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Test Limits |
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Pin |
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±30°C |
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+25°C |
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+85°C |
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Under |
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Characteristic |
Symbol |
Test |
Min |
Max |
Min |
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Typ |
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Max |
Min |
Max |
Unit |
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Power Supply Drain Current |
IE |
8 |
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42 |
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30 |
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38 |
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42 |
mAdc |
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Input Current |
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IinH |
5, 6, 7 |
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680 |
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425 |
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425 |
μAdc |
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IinL |
5, 6, 7 |
0.5 |
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0.5 |
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0.3 |
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μAdc |
Output Voltage |
Logic 1 |
VOH |
2 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
Vdc |
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3 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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4 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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Output Voltage |
Logic 0 |
VOL |
2 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
Vdc |
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3 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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4 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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Threshold Voltage |
Logic 1 |
VOHA |
2 |
±1.080 |
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±0.980 |
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±0.910 |
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Vdc |
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3 |
±1.080 |
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±0.980 |
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±0.910 |
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4 |
±1.080 |
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±0.980 |
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±0.910 |
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Threshold Voltage |
Logic 0 |
VOLA |
2 |
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±1.655 |
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±1.630 |
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±1.595 |
Vdc |
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3 |
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±1.655 |
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±1.630 |
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±1.595 |
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4 |
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±1.655 |
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±1.630 |
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±1.595 |
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Switching Times |
(50Ω Load) |
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ns |
Propagation Delay |
t5+2± |
2 |
1.4 |
3.5 |
1.4 |
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2.4 |
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3.5 |
1.5 |
3.8 |
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t5±2+ |
2 |
1.4 |
3.5 |
1.4 |
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2.4 |
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3.5 |
1.5 |
3.8 |
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t5+3± |
3 |
1.4 |
3.5 |
1.4 |
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2.4 |
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3.5 |
1.5 |
3.8 |
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t5±3+ |
3 |
1.4 |
3.5 |
1.4 |
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2.4 |
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3.5 |
1.5 |
3.8 |
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t5+4± |
4 |
1.4 |
3.5 |
1.4 |
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2.4 |
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3.5 |
1.5 |
3.8 |
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t5±4+ |
4 |
1.4 |
3.5 |
1.4 |
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2.4 |
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3.5 |
1.5 |
3.8 |
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Rise Time |
(20 to 80%) |
t2+ |
2 |
1.0 |
3.5 |
1.1 |
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2.2 |
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3.5 |
1.2 |
3.8 |
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t3+ |
3 |
1.0 |
3.5 |
1.1 |
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2.2 |
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3.5 |
1.2 |
3.8 |
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t4+ |
4 |
1.0 |
3.5 |
1.1 |
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2.2 |
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3.5 |
1.2 |
3.8 |
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Fall Time |
(20 to 80%) |
t2± |
2 |
1.0 |
3.5 |
1.1 |
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2.2 |
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3.5 |
1.2 |
3.8 |
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t3± |
3 |
1.0 |
3.5 |
1.1 |
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2.2 |
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3.5 |
1.2 |
3.8 |
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t4± |
4 |
1.0 |
3.5 |
1.1 |
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2.2 |
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3.5 |
1.2 |
3.8 |
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MECL Data |
3±45 |
MOTOROLA |
DL122 Ð Rev 6 |
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