MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 4 to 1 Multiplexer |
|
The MC10174 is a high speed dual channel multiplexer with output |
MC10174 |
enable capability. The select inputs determine one of four active data |
|
inputs for each multiplexer. An output enable forces both outputs low |
|
when in the high state. |
|
PD = 305 mW typ/pkg (No Load) tpd = 3.5 ns typ (Data to output) tr, tf = 2.0 ns typ (20%±80%)
|
LOGIC DIAGRAM |
D00 |
3 |
D01 |
5 |
D02 |
4 |
D03 |
6 |
A |
7 |
B |
9 |
ENABLE 14 |
|
D10 |
13 |
D11 |
11 |
D12 |
12 |
D13 |
10 |
|
VCC1 = PIN 1 |
|
VCC2 = PIN 16 |
|
VEE = PIN 8 |
|
|
|
|
L SUFFIX |
|
|
|
|
|
CERAMIC PACKAGE |
|
|
|
|
|
CASE 620±10 |
|
|
|
|
|
P SUFFIX |
|
|
|
|
|
PLASTIC PACKAGE |
|
|
|
|
|
CASE 648±08 |
|
|
|
|
|
FN SUFFIX |
|
|
|
|
|
PLCC |
|
|
|
|
|
CASE 775±02 |
|
2 |
Q0 |
|
|
|
|
|
|
|
|
DIP |
|
|
|
|
PIN ASSIGNMENT |
|
|
|
|
VCC1 |
1 |
16 |
VCC2 |
|
|
Q0 |
2 |
15 |
Q1 |
|
|
DO0 |
3 |
14 |
ENABLE |
|
|
DO2 |
4 |
13 |
D10 |
|
|
DO1 |
5 |
12 |
D12 |
|
|
DO3 |
6 |
11 |
D11 |
15 Q1 |
A |
7 |
10 |
D13 |
|
|
|
VEE |
8 |
9 |
B |
Pin assignment is for Dual±in±Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6±36 of the Motorola MECL Data
Book (DL122/D).
TRUTH TABLE
ENABLE |
ADDRESS INPUTS |
OUTPUTS |
||
|
|
|
|
|
E |
B |
A |
Q0 |
Q1 |
|
|
|
|
|
H |
X |
X |
L |
L |
|
|
|
|
|
L |
L |
L |
D00 |
D10 |
|
|
|
|
|
L |
L |
H |
D01 |
D11 |
|
|
|
|
|
L |
H |
L |
D02 |
D12 |
|
|
|
|
|
L |
H |
H |
D03 |
D13 |
|
|
|
|
|
3/93
Motorola, Inc. 1996 |
3±122 |
REV 5 |
MC10174
ELECTRICAL CHARACTERISTICS
|
|
|
|
|
|
|
Test Limits |
|
|
|
|
||
|
|
|
Pin |
|
|
|
|
|
|
|
|
|
|
|
|
|
±30°C |
|
|
+25°C |
|
+85°C |
|
||||
|
|
|
Under |
|
|
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Characteristic |
Symbol |
Test |
Min |
Max |
Min |
|
Typ |
|
Max |
Min |
Max |
Unit |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power Supply Drain Current |
IE |
8 |
|
80 |
|
|
58 |
|
73 |
80 |
|
mAdc |
|
Input Current |
|
IinH |
4 |
|
350 |
|
|
|
|
220 |
|
220 |
μAdc |
|
|
|
14 |
|
525 |
|
|
|
|
330 |
|
330 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IinL |
4 |
0.5 |
|
0.5 |
|
|
|
|
0.3 |
|
μAdc |
Output Voltage |
Logic 1 |
VOH |
15 |
±1.060 |
±0.890 |
±0.960 |
|
|
|
±0.810 |
±0.890 |
±0.700 |
Vdc |
Output Voltage |
Logic 0 |
VOL |
15 |
±1.890 |
±1.675 |
±1.850 |
|
|
|
±1.650 |
±1.825 |
±1.615 |
Vdc |
Threshold Voltage |
Logic 1 |
VOHA |
15 |
±1.080 |
|
±0.980 |
|
|
|
|
±0.910 |
|
Vdc |
Threshold Voltage |
Logic 0 |
VOLA |
15 |
|
±1.655 |
|
|
|
|
±1.630 |
|
±1.595 |
Vdc |
Switching Times |
(50Ω Load) |
|
|
|
|
|
|
|
|
|
|
|
ns |
Propagation Delay |
t13+15+ |
15 |
1.4 |
5.0 |
1.5 |
|
3.5 |
|
4.7 |
1.4 |
5.0 |
|
|
|
|
t13±15± |
15 |
1.4 |
5.0 |
1.5 |
|
3.5 |
|
4.7 |
1.4 |
5.0 |
|
|
|
t7+15± |
15 |
1.9 |
6.6 |
2.0 |
|
5.0 |
|
6.2 |
2.1 |
6.6 |
|
|
|
t7±15+ |
15 |
1.9 |
6.6 |
2.0 |
|
5.0 |
|
6.2 |
2.1 |
6.6 |
|
|
|
t14+15± |
15 |
1.0 |
3.3 |
1.0 |
|
2.0 |
|
3.1 |
0.9 |
3.4 |
|
|
|
t14±15+ |
15 |
1.0 |
3.3 |
1.0 |
|
2.0 |
|
3.1 |
0.9 |
3.4 |
|
Rise Time |
(20 to 80%) |
t+ |
15 |
1.0 |
3.4 |
1.1 |
|
2.0 |
|
3.3 |
1.1 |
3.6 |
|
Fall Time |
(20 to 80%) |
t± |
15 |
1.0 |
3.4 |
1.1 |
|
2.0 |
|
3.3 |
1.1 |
3.6 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ELECTRICAL CHARACTERISTICS (continued)
|
Each MECL 10,000 series circuit has been designed |
|
|
|
TEST VOLTAGE VALUES (Volts) |
|
|
|
|||
|
to meet the dc specifications shown in the test table, |
@ Test Temperature |
VIHmax |
VILmin |
VIHAmin |
VILAmax |
VEE |
|
|
||
|
after thermal equilibrium has been established. The |
|
|
||||||||
|
circuit is in a test socket or mounted on a printed circuit |
|
±30 C |
|
|
|
|
|
|
|
|
|
|
±0.890 |
±1.890 |
±1.205 |
±1.500 |
±5.2 |
|
|
|||
|
board and transverse air flow greater than 500 linear |
|
|
|
|||||||
|
|
° |
|
|
|
|
|
|
|
||
|
fpm is maintained. Outputs are terminated through a |
|
+25°C |
|
|
|
|
|
|
|
|
|
|
±0.810 |
±1.850 |
±1.105 |
±1.475 |
±5.2 |
|
|
|||
|
50±ohm resistor to ±2.0 volts. Test procedures are |
|
|
|
|||||||
|
shown for only one gate. The other gates are tested in |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
the same manner. |
|
|
+85°C |
±0.700 |
±1.825 |
±1.035 |
±1.440 |
±5.2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Pin |
TEST VOLTAGE APPLIED TO PINS LISTED BELOW |
|
|
||||
|
|
|
|
Under |
|
|
|
|
|
(VCC) |
|
|
|
|
|
|
|
|
|
|
|
||
|
Characteristic |
|
Symbol |
Test |
VIHmax |
VILmin |
VIHAmin |
VILAmax |
VEE |
Gnd |
|
|
Power Supply Drain Current |
IE |
8 |
|
|
|
|
8 |
1, 16 |
|
|
|
Input Current |
|
IinH |
4 |
4 |
|
|
|
8 |
1, 16 |
|
|
|
|
|
14 |
14 |
|
|
|
8 |
1, 16 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IinL |
4 |
|
4 |
|
|
8 |
1, 16 |
|
|
Output Voltage |
Logic 1 |
VOH |
15 |
13 |
|
|
|
8 |
1, 16 |
|
|
Output Voltage |
Logic 0 |
VOL |
15 |
14 |
|
|
|
8 |
1, 16 |
|
|
Threshold Voltage |
Logic 1 |
VOHA |
15 |
|
|
13 |
|
8 |
1, 16 |
|
|
Threshold Voltage |
Logic 0 |
VOLA |
15 |
|
|
14 |
|
8 |
1, 16 |
|
|
Switching Times |
(50Ω Load) |
|
|
+1.11V |
|
Pulse In |
Pulse Out |
±3.2 V |
+2.0 V |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Propagation Delay |
|
t13+15+ |
15 |
|
|
13 |
15 |
8 |
1, 16 |
|
|
|
|
t13±15± |
15 |
|
|
13 |
15 |
8 |
1, 16 |
|
|
|
|
t7+15± |
15 |
11 |
|
7 |
15 |
8 |
1, 16 |
|
|
|
|
t7±15+ |
15 |
11 |
|
7 |
15 |
8 |
1, 16 |
|
|
|
|
t14+15± |
15 |
13 |
|
14 |
15 |
8 |
1, 16 |
|
|
|
|
t14±15+ |
15 |
13 |
|
14 |
15 |
8 |
1, 16 |
|
|
Rise Time |
(20 to 80%) |
t+ |
15 |
13 |
|
14 |
15 |
8 |
1, 16 |
|
|
Fall Time |
(20 to 80%) |
t± |
15 |
13 |
|
14 |
15 |
8 |
1, 16 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
MECL Data |
|
|
|
3±123 |
|
|
|
|
MOTOROLA |
|
|
DL122 Ð Rev 6 |
|
|
|
|
|
|
|
|
|
|
Loading...