MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quint Differential Line
Receiver
The MC10E416/100E416 is a 5-bit differential line receiving device. The 2.0GHz of bandwidth provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators.
A VBB pin is available to AC couple an input signal to the device. More information on AC coupling can be found in the design handbook section of this data book.
The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.
The differential inputs have internal clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC.
•Differential D and Q; VBB available
•600ps Max. Propagation Delay
•High Frequency Outputs
•2 Stages of Gain
•Extended 100E VEE Range of ± 4.2V to ± 5.46V
•Internal 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View)
MC10E416
MC100E416
QUINT DIFFERENTIAL
LINE RECEIVER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
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D3 |
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D4 |
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D4 |
VCCO |
Q4 |
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Q4 |
VCCO |
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D3 |
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Q3 |
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D2 |
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Q3 |
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D2 |
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VCC |
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1 |
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VEE |
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Q2 |
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VBB |
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2 |
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Q2 |
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D0 |
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VCCO |
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D0 |
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Q1 |
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D1 |
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D1 |
VCCO |
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Q0 |
Q0 |
VCCO |
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Q1 |
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* All VCC and VCCO pins are tied together on the die. |
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PIN NAMES
Pin |
Function |
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D[0:4], D[0:4] |
Differential Data Inputs |
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Q[0:4], Q[0:4] |
Differential Data Outputs |
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LOGIC DIAGRAM |
D0 |
Q0 |
D0 |
Q0 |
D1 |
Q1 |
D1 |
Q1 |
D2 |
Q2 |
D2 |
Q2 |
D3 |
Q3 |
D3 |
Q3 |
D4 |
Q4 |
D4 |
Q4 |
VBB
12/93
Motorola, Inc. 1996 |
REV 2 |
MC10E416 MC100E416
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
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0°C |
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25°C |
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85°C |
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Symbol |
Characteristic |
min typ |
max |
min |
typ |
max |
min |
typ |
max |
Unit |
Condition |
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VBB |
Output Reference Voltage |
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V |
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10E |
±1.38 |
±1.27 |
±1.35 |
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±1.25 |
±1.31 |
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±1.19 |
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100E |
±1.38 |
±1.26 |
±1.38 |
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±1.26 |
±1.38 |
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±1.26 |
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IIH |
Input HIGH Current |
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150 |
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150 |
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150 |
μA |
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IEE |
Power Supply Current |
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mA |
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10E |
135 |
162 |
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135 |
162 |
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135 |
162 |
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100E |
135 |
162 |
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135 |
162 |
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155 |
186 |
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VPP(DC) |
Input Sensitivity |
50 |
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50 |
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50 |
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mV |
1 |
VCMR |
Common Mode Range |
±1.5 |
0 |
±1.5 |
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0 |
±1.5 |
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0 |
V |
2 |
1.Differential input voltage required to obtain a full ECL swing on the outputs.
2.VCMR is referenced to the most positive side of the differential input signal. Normal operation is obtained when the input signal are within the VCMR range and the input swing is greater than VPP MIN and < 1.0V
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
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0°C |
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25°C |
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85°C |
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Symbol |
Characteristic |
min |
typ |
max |
min |
typ |
max |
min |
typ |
max |
Unit |
Condition |
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tPLH |
Propagation Delay to Output |
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ps |
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tPHL |
d(Diff) |
250 |
350 |
500 |
250 |
350 |
500 |
250 |
350 |
500 |
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D(SE) |
200 |
350 |
550 |
200 |
350 |
550 |
200 |
350 |
550 |
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tSKEW |
Within-Device Skew |
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50 |
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50 |
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50 |
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ps |
1 |
tSKEW |
Duty Cycle Skew |
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±10 |
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±10 |
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±10 |
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tPLH-tPHL |
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ps |
2 |
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VPP(AC) |
Minimum Input Swing |
150 |
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150 |
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150 |
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mV |
3 |
tr |
Rise/Fall Time |
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tf |
20 - 80% |
100 |
200 |
350 |
100 |
200 |
350 |
100 |
200 |
350 |
ps |
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1.Within-device skew is defined as identical transitions on similar paths through a device.
2.Duty cycle skew defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs.
3.Minimum input swing for which AC parameters are guaranteed.
MOTOROLA |
2±2 |