MOTOROLA MC10E241FNR2, MC100E241FNR2, MC100E241FN Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

8 Bit Scannable Register	MC10E241
The MC10E/100E241 is an 8-bit shiftable register. Unlike a standard	MC100E241
universal shift register such as the E141, the E241 features internal data
feedback organized so that the SHIFT control overrides the HOLD/LOAD
control. This enables the normal operations of HOLD and LOAD to be
toggled with a single control line without the need for external gating. It
also enables switching to scan mode with the single SHIFT control line.
The eight inputs D0 ± D7 accept parallel input data, while S-IN accepts	8-BIT SCANNABLE
serial input data when in shift mode. Data is accepted a set-up time	REGISTER
before the positive-going edge of CLK; shifting is also accomplished on
the positive clock edge. A HIGH on the Master Reset pin (MR)
asynchronously resets all the registers to zero.

•SHIFT overrides HOLD/LOAD Control

•1000ps Max. CLK to Q

•Asynchronous Master Reset

• Pin-Compatible with E141

• Extended 100E VEE Range of ± 4.2V to ± 5.46V

• 75kΩ Input Pulldown Resistors

																					FN SUFFIX
				Pinout: 28-Lead PLCC (Top View)																	PLASTIC PACKAGE
																					CASE 776-02
			SEL0			NC		D7		D6		D5	VCCO			Q7
25						24	23			22	21		20			19
SEL1			26													18				Q6

CLK

27

17

Q5

MR

28

16

VCC

LOGIC DIAGRAM

VEE

1

15

NC

S-IN

S-IN

2

14

VCCO

D

Q

Q0

D0

3

13

Q4

D0

R

D1

4

12

Q3

5

6

7

8

9

10

11

D

Q

Q1 ± Q6

D2

D3

D4

VCCO

Q0

Q1

Q2

D1 ± D6

R

* All VCC and VCCO pins are tied together on the die.

BITS 1±6

PIN NAMES

Pin

Function

D

0

± D

Parallel Date Inputs

D

Q

Q7

7

S-IN

Serial Data Inputs

D7

SEL0

SHIFT Control

R

SEL1

HOLD/LOAD Control

HOLD/LOAD

CLK

Clock

SHIFT

MR

Master Reset

CLK

Q0 ± Q7

Data Outputs

MR

7/96

Motorola, Inc. 1996

REV 3

MC10E241 MC100E241

DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

		0°C			25°C			85°C
Symbol	Characteristic	min typ	max	min	typ	max	min	typ	max	Unit	Condition
IIH	Input HIGH Current		150			150			150	μA
IEE	Power Supply Current									MA
	10E	125	150		125	150		125	150
	100E	125	150		125	150		144	173

AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

					0°C			25°C			85°C
Symbol	Characteristic			min	typ	max	min	typ	max	min	typ	max	Unit	Condition
fSHIFT	Max. Shift Frequency			700	900		700	900		700	900		MHz
tPLH	Propagation Delay to Output												ps
tPHL	Clk			625	750	975	625	750	975	625	750	975
	MR			600	725	975	600	725	975	600	725	975
ts	Setup Time												ps
	D			175	25		175	25		175	25
	SEL0 (SHIFT)			350	200		350	200		350	200
	SEL1 (HOLD/LOAD)			400	250		400	250		400	250
	S-IN			125	±100		125	±100		125	±100
th	Hold Time												ps
	D			200	± 25		200	± 25		200	± 25
	SEL0 (SHIFT)			100	± 200		100	± 200		100	± 200
	SEL1 (HOLD/LOAD)			50	± 250		50	± 250		50	± 250
	S-IN			300	100		300	100		300	100
tRR	Reset Recovery Time			900	600		900	600		900	600		ps
tPW	Minimum Pulse Width												ps
	Clk, MR			400			400			400
tSKEW	Within-Device Skew				60			60			60		ps	1
tr	Rise/Fall Times												ps
tf	20 - 80%			300	525	800	300	525	800	300	525	800

1. Within-device skew is defined as identical transitions on similar paths through a device.

FUNCTION TABLE

MR	SEL0	SEL1	Function
1	X	X	Outputs LOW
0	1	X	Shift Data
0	0	1	Hold Data
0	0	0	Load Data

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2±2