MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input Multiplexer
(Inverting)
The MC10159 is a quad two channel multiplexer with enable. It incorporates common enable and common data select inputs. The select input determines which data inputs are enabled. A high (H) level enables data inputs D00, D10, D20, and D30. A low (L) level enables data inputs D01, D11, D21, and D31. Any change on the data inputs will be reflected at the outputs while the enable is low. Input levels are inverted at the output.
PD = 218 mW typ/pkg (No Load)
tpd = 2.5 ns typ (Data to Q) 3.2 ns typ (Select to Q)
tr, tf = 2.5 ns typ (20%±80%)
LOGIC DIAGRAM
SELECT
9
D01 5
D00 6
D11 3
D10 4
ENABLE
7
D21 12
D20 13
D31 10
D30 11
TRUTH TABLE
Enable |
Select |
D0 |
D1 |
Q |
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L |
L |
X |
L |
H |
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L |
L |
X |
H |
L |
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L |
H |
L |
X |
H |
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L |
H |
H |
X |
L |
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H |
X |
X |
X |
L |
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1 Q0
2 Q1
15 Q2
14 Q3
VCC = PIN 16
VEE = PIN 8
MC10159
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
DIP
PIN ASSIGNMENT
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Q0 |
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1 |
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16 |
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VCC |
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Q1 |
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2 |
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15 |
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Q2 |
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D11 |
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3 |
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14 |
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Q3 |
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D10 |
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4 |
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13 |
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D20 |
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D01 |
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5 |
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12 |
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D21 |
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D00 |
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6 |
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11 |
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D30 |
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D31 |
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ENABLE |
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7 |
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10 |
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VEE |
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8 |
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9 |
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SELECT |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).
3/93
Motorola, Inc. 1996 |
3±65 |
REV 5 |
MC10159
ELECTRICAL CHARACTERISTICS
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Test Limits |
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Pin |
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±30°C |
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+25°C |
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+85°C |
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Under |
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Characteristic |
Symbol |
Test |
Min |
Max |
Min |
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Typ |
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Max |
Min |
Max |
Unit |
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Power Supply Drain Current |
IE |
8 |
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58 |
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42 |
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53 |
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58 |
mAdc |
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Input Current |
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IinH |
9 |
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360 |
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225 |
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225 |
μAdc |
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5 |
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400 |
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250 |
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250 |
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IinL |
5 |
0.5 |
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0.5 |
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0.3 |
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μAdc |
Output Voltage |
Logic 1 |
VOH |
1 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
Vdc |
Output Voltage |
Logic 0 |
VOL |
1 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
Vdc |
Threshold Voltage |
Logic 1 |
VOHA |
1 |
±1.080 |
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±0.980 |
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±0.910 |
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Vdc |
Threshold Voltage |
Logic 0 |
VOLA |
1 |
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±1.655 |
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±1.630 |
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±1.595 |
Vdc |
Switching Times |
(50Ω Load) |
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ns |
Propagation |
Data Input |
t5+1± |
1 |
1.1 |
3.8 |
1.2 |
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2.5 |
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3.3 |
1.1 |
3.8 |
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Delay |
Select Input |
t9+1± |
1 |
1.5 |
5.3 |
1.5 |
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3.2 |
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5.0 |
1.5 |
5.3 |
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Enable Input |
t7+1± |
1 |
1.4 |
5.3 |
1.5 |
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2.5 |
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5.0 |
1.4 |
5.3 |
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Rise Time |
(20 to 80%) |
t1+ |
1 |
1.0 |
3.7 |
1.1 |
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2.5 |
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3.5 |
1.0 |
3.7 |
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Fall Time |
(20 to 80%) |
t1± |
1 |
1.0 |
3.7 |
1.1 |
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2.5 |
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3.5 |
1.0 |
3.7 |
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ELECTRICAL CHARACTERISTICS (continued)
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TEST VOLTAGE VALUES (Volts) |
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@ Test Temperature |
VIHmax |
VILmin |
VIHAmin |
VILAmax |
VEE |
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±30°C |
±0.890 |
±1.890 |
±1.205 |
±1.500 |
±5.2 |
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+25°C |
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±0.810 |
±1.850 |
±1.105 |
±1.475 |
±5.2 |
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+85°C |
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±0.700 |
±1.825 |
±1.035 |
±1.440 |
±5.2 |
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Pin |
TEST VOLTAGE APPLIED TO PINS LISTED BELOW |
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Under |
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(VCC) |
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Characteristic |
Symbol |
Test |
VIHmax |
VILmin |
VIHAmin |
VILAmax |
VEE |
Gnd |
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Power Supply Drain Current |
IE |
8 |
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8 |
16 |
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Input Current |
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IinH |
9 |
9 |
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8 |
16 |
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5 |
5 |
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8 |
16 |
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IinL |
5 |
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5 |
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8 |
16 |
Output Voltage |
Logic 1 |
VOH |
1 |
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8 |
16 |
Output Voltage |
Logic 0 |
VOL |
1 |
5 |
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8 |
16 |
Threshold Voltage |
Logic 1 |
VOHA |
1 |
9 |
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6 |
8 |
16 |
Threshold Voltage |
Logic 0 |
VOLA |
1 |
9 |
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6 |
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8 |
16 |
Switching Times |
(50Ω Load) |
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+1.11V |
+0.31V |
Pulse In |
Pulse Out |
±3.2 V |
+2.0 V |
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Propagation Delay |
Data Input |
t5+1± |
1 |
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5 |
1 |
8 |
16 |
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Select Input |
t9+1± |
1 |
6 |
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9 |
1 |
8 |
16 |
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Enable Input |
t7+1± |
1 |
3, 12 |
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7 |
1 |
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Rise Time |
(20 to 80%) |
t1+ |
1 |
9 |
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5 |
1 |
8 |
16 |
Fall Time |
(20 to 80%) |
t1± |
1 |
9 |
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5 |
1 |
8 |
16 |
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50±ohm resistor to ±2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
MOTOROLA |
3±66 |
MECL Data |
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DL122 Ð Rev 6 |
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