Motorola MC10E404FNR2, MC100E404FN, MC10E404FN, MC100E404FNR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Quad Differential AND/NAND

The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper and lower level gate inputs.

Because a negative 2-input NAND function is equivalent to a 2-input OR function, the differential inputs and outputs of the device also allow for its use as a fully differential 2 input OR/NOR function.

The output RISE/FALL times of this device are significantly faster than most other standard ECLinPS devices resulting in an increased bandwidth.

The differential inputs have clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC.

•Differential D and Q

•700ps Max. Propagation Delay

•High Frequency Outputs

•Extended 100E VEE Range of ± 4.2V to ± 5.46V

•Internal 75kΩ Input Pulldown Resistors

					D3a				D3a		D3b			D3b VCCO					Q3			Q3
				25				24			23			22		21			20		19
D2b																										Q2
			26																		18
D2b			27																		17					Q2
																										VCC
D2a			28					Pinout: 28-Lead PLCC													16
VEE			1																		15					Q1
											(Top View)
D2a			2																		14					Q1
																										Q0
D1b			3																		13
D1b			4																		12					Q0
				5				6			7			8		9			10		11
					D1a				D1a		D0b			D0b		D0a			D0a		VCCO

* All VCC and VCCO pins are tied together on the die.

PIN NAMES

MC10E404

MC100E404

QUAD DIFFERENTIAL

AND/NAND

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

LOGIC DIAGRAM

	D0a	Q0
	D0a
	D0b	Q0
	D0b
	D1a	Q1
	D1a
	D1b	Q1
	D1b
	D2a	Q2
	D2a
	D2b	Q2
	D2b

Pin

Function

D3a

Q3

D3a

D[0:4], D[0:4]

Differential Data Inputs

D3b

Q3

D3b

Q[0:4], Q[0:4]

Differential Data Outputs

FUNCTION TABLE

	Da	Db	Q	Da	Db	Q
	L	L	L	L	L	L
	L	H	L	L	H	H
	H	L	L	H	L	H
	H	H	H	H	H	H
12/93
Motorola, Inc. 1996							REV 2

MC10E404 MC100E404

DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

		0°C			25°C			85°C
Symbol	Characteristic	min typ	max	min	typ	max	min	typ	max	Unit	Condition
IIH	Input HIGH Current		150			150			150	μA
IEE	Power Supply Current									mA
	10E	106	127		106	127		106	127
	100E	106	127		106	127		122	146
VPP(DC)	Input Sensitivity	50		50			50			mV	1
VCMR	Common Mode Range	±1.5	0	±1.5		0	±1.5		0	V	2

1.Differential input voltage required to obtain a full ECL swing on the outputs.

2.VCMR is referenced to the most positive side of the differential input signal. Normal operation is obtained when the input signals are within the VCMR range and the input swing is greater than VPP MIN and < 1.0V.

AC CHARACTERISTICS (VEE= VEE(min) to VEE(max); VCC = VCCO = GND)

			0°C			25°C			85°C
Symbol	Characteristic	min	typ	max	min	typ	max	min	typ	max	Unit	Condition
tPLH	Propagation Delay to Output										ps
tPHL	Da (Diff)	350	475	650	350	475	650	350	475	650
	Da (SE)	300	475	700	300	475	700	300	475	700
	Db (Diff)	375	500	675	375	500	675	375	500	675
	Db (SE)	325	500	725	325	500	725	325	500	725
tSKEW	Within-Device Skew		50			50			50		ps	1
VPP(AC)	Minimum Input Swing	150			150			150			mV	2
tr	Rise/Fall Time
tf	20 - 80%	150		400	150		400	150		400	ps

1.Within-device skew is defined as identical transitions on similar paths through a device.

2.Minimum input swing for which AC parameters are guaranteed.

MOTOROLA

2±2