MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
5 Bit Differential Register
The MC10E/100E452 is a 5-bit differential register with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go LOW.
The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the D and the CLK sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. Note that the input clamps only operate when both inputs fall to 2.5V below VCC.
The fully differential design of the device makes it ideal for very high frequency applications where a registered data path is necessary.
•Differential D, CLK and Q; VBB Reference Available
•1100MHz Min. Toggle Frequency
•Asynchronous Master Reset
•Extended 100E VEE Range of ± 4.2V to ± 5.46V
Pinout: 28-Lead PLCC (Top View)
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D3 |
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D3 |
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D4 |
D4 VCCO Q4 |
Q4 |
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25 |
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19 |
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MR |
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26 |
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18 |
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Q3 |
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17 |
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CLK |
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27 |
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Q3 |
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28 |
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VCC |
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CLK |
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16 |
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1 |
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VEE |
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15 |
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Q2 |
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VBB |
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2 |
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14 |
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Q2 |
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D2 |
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3 |
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13 |
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Q1 |
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D2 |
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4 |
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12 |
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Q1 |
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5 |
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6 |
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8 |
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9 |
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10 |
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11 |
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D1 |
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D1 |
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D0 |
D0 |
VCCO |
Q0 |
Q0 |
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* All VCC and VCCO pins are tied together on the die. |
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PIN NAMES
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Pin |
Function |
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D[0:4], D[0:4] |
Differential Data Inputs |
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MR |
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Master Reset Input |
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CLK, CLK |
Differential Clock Input |
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VBB |
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VBB Reference Output |
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Q[0:4], Q[0:4] |
Differential Data Outputs |
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MC10E452
MC100E452
5-BIT DIFFERENTIAL
REGISTER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
LOGIC DIAGRAM
D0 |
D |
Q |
Q0 |
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D0 |
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Q0 |
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R |
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D1 |
D |
Q |
Q1 |
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D1 |
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Q1 |
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R |
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D2 |
D |
Q |
Q2 |
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D2 |
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Q2 |
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R |
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D3 |
D |
Q |
Q3 |
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D3 |
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Q3 |
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R |
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D4 |
D |
Q |
Q4 |
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D4 |
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Q4 |
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CLK |
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R |
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CLK |
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MR |
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VBB |
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12/93
Motorola, Inc. 1996 |
REV 2 |
MC10E452 MC100E452
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
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±40°C |
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0°C |
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25°C |
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85°C |
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Symbol |
Characteristic |
Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
Unit |
Cond |
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VBB |
Output Reference |
±1.43 |
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±1.30 |
±1.38 |
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±1.27 |
±1.35 |
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±1.25 |
±1.31 |
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±1.19 |
V |
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Voltage |
10E |
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100E |
±1.38 |
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±1.26 |
±1.38 |
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±1.26 |
±1.38 |
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±1.26 |
±1.38 |
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±1.26 |
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IIH |
Input HIGH |
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150 |
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150 |
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150 |
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150 |
μA |
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Current |
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IEE |
Power Supply |
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74 |
89 |
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74 |
89 |
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74 |
89 |
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74 |
89 |
mA |
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Current |
10E |
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100E |
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74 |
89 |
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74 |
89 |
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74 |
89 |
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85 |
102 |
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VCMR |
Common Mode |
±2.0 |
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±0.4 |
±2.0 |
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±0.4 |
±2.0 |
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±0.4 |
±2.0 |
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±0.4 |
V |
1 |
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Range |
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1.VCMR is referenced to the most positive side of the differential input signal. Normal specified operation is obtained when the input signals are within the VCMR range and the input swing is greater than VPP.
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
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±40°C |
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0°C to 85°C |
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Symbol |
Characteristic |
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Min |
Typ |
Max |
Min |
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Typ |
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Max |
Unit |
Condition |
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fMAX |
Maximum Toggle Frequency |
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1000 |
1400 |
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1100 |
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1400 |
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MHz |
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tPLH |
Propagation Delay to Output |
CLK (Diff) |
425 |
600 |
850 |
475 |
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600 |
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800 |
ps |
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tPHL |
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CLK (SE) |
375 |
600 |
900 |
425 |
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600 |
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850 |
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MR |
375 |
625 |
900 |
425 |
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625 |
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850 |
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tS |
Setup Time |
D |
175 |
±50 |
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150 |
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±50 |
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ps |
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tH |
Hold Time |
D |
225 |
50 |
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200 |
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50 |
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ps |
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tRR |
Reset Recovery Time |
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750 |
450 |
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700 |
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450 |
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tPW |
Minimum Pulse Width |
CLK |
400 |
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400 |
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ps |
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MR |
400 |
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400 |
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tskew |
Within-Device Skew |
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50 |
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50 |
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ps |
1 |
VPP |
Minimum Input Swing |
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150 |
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150 |
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mV |
2 |
tr/tf |
Rise/Fall Times |
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250 |
475 |
725 |
275 |
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475 |
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675 |
ps |
20±80% |
1.Within-device skew is defined as identical transitions on similar paths through a device.
2.Minimum input swing for which AC parameters are guaranteed.
MOTOROLA |
2±2 |
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