MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple Line Receiver
The MC10114 is a triple line receiver designed for use in sensing differential signals over long lines. An active current source and translated emitter follower inputs provide the line receiver with a common mode noise rejection limit of one volt in either the positive or the negative direction. This allows a large amount of common mode noise immunity for extra long lines.
Another feature of the MC10114 is that the OR outputs go to a logic low level whenever the inputs are left floating. The outputs are each capable of driving 50 ohm transmission lines.
This device is useful in high speed central processors, minicomputers, peripheral controllers, digital communication systems, testing and instrumen± tation systems. The MC10114 can also be used for MOS to MECL interfacing and it is ideal as a sense amplifier for MOS RAM's.
A VBB reference is provided which is useful in making the MC10114 a Schmit trigger, allowing single±ended driving of the inputs, or other applications where a stable reference voltage is necessary. See MECL Design Handbook (HB205) pages 226 and 228.
PD = 145 mW typ/pkg
tpd = 2.4 ns typ (Single Ended Input) tpd = 2.0 ns typ (Differential Input) tr, tf = 2.1 ns typ (20% to 80%)
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LOGIC DIAGRAM |
4 |
2 |
5 |
3 |
9 |
6 |
10 |
7 |
12 |
14 |
13 |
15 |
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11 |
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VBB* |
VCC1 |
= PIN 1 |
VCC2 |
= PIN 16 |
VEE |
= PIN 8 |
MC10114
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
DIP
PIN ASSIGNMENT
VCC1 |
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1 |
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16 |
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VCC2 |
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COUT |
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AOUT |
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2 |
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15 |
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AOUT |
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3 |
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14 |
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COUT |
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CIN |
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AIN |
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4 |
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13 |
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AIN |
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5 |
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12 |
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CIN |
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VBB |
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BOUT |
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6 |
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11 |
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BOUT |
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7 |
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10 |
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BIN |
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VEE |
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8 |
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9 |
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BIN |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).
*VBB to be used to supply bias to the MC10114 only and bypassed (when used) with 0.01 μF to 0.1 μF capacitor to ground (0 V). VBB can source < 1.0 mA.
When the input pin with the bubble goes positive, its respective output pin with bubble goes positive.
3/93
Motorola, Inc. 1996 |
3±53 |
REV 5 |
MC10114
ELECTRICAL CHARACTERISTICS
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Test Limits |
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Pin |
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±30°C |
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+25°C |
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+85°C |
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Under |
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Characteristic |
Symbol |
Test |
Min |
Max |
Min |
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Typ |
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Max |
Min |
Max |
Unit |
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Power Supply Drain Current |
IE |
8 |
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39 |
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28 |
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35 |
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39 |
mAdc |
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Input Current |
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IinH |
4 |
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70 |
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45 |
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45 |
μAdc |
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ICBO |
4 |
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1.5 |
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1.0 |
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1.0 |
μAdc |
Output Voltage |
Logic 1 |
VOH |
2 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
Vdc |
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3 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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Output Voltage |
Logic 0 |
VOL |
2 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
Vdc |
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3 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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Threshold Voltage |
Logic 1 |
VOHA |
2 |
±1.080 |
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±0.980 |
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±0.910 |
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Vdc |
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3 |
±1.080 |
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±0.980 |
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±0.910 |
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Threshold Voltage |
Logic 0 |
VOLA |
2 |
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±1.655 |
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±1.630 |
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±1.595 |
Vdc |
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3 |
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±1.655 |
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±1.630 |
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±1.595 |
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Reference Voltage |
VBB |
11 |
±1.420 |
±1.280 |
±1.350 |
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±1.230 |
±1.295 |
±1.150 |
Vdc |
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Common Mode Rejection |
VOH |
2 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
Vdc |
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Test |
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3 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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VOL |
2 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
Vdc |
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3 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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Switching Times |
(50Ω Load) |
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Min |
Max |
Min |
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Typ |
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Max |
Min |
Max |
ns |
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Propagation Delay |
t4+2+ |
2 |
1.0 |
4.4 |
1.0 |
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2.4 |
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4.0 |
0.9 |
4.3 |
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t4±2± |
2 |
1.0 |
4.4 |
1.0 |
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2.4 |
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4.0 |
0.9 |
4.3 |
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t4+3± |
3 |
1.0 |
4.4 |
1.0 |
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2.4 |
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4.0 |
0.9 |
4.3 |
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t4±3+ |
3 |
1.0 |
4.4 |
1.0 |
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2.4 |
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4.0 |
0.9 |
4.3 |
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Rise Time |
(20 to 80%) |
t2+ |
2 |
1.5 |
3.8 |
1.5 |
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2.1 |
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3.5 |
1.5 |
3.7 |
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t3+ |
3 |
1.5 |
3.8 |
1.5 |
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2.1 |
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3.5 |
1.5 |
3.7 |
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Fall Time |
(20 to 80%) |
t2± |
2 |
1.5 |
3.8 |
1.5 |
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2.1 |
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3.5 |
1.5 |
3.7 |
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t3± |
3 |
1.5 |
3.8 |
1.5 |
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2.1 |
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3.5 |
1.5 |
3.7 |
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MOTOROLA |
3±54 |
MECL Data |
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DL122 Ð Rev 6 |
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