Motorola MC10E150FNR2, MC10E150FN, MC100E150FN, MC100E150FNR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

6 Bit D Latch

The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset (MR) overrides all other controls to set the Q outputs low.

•800ps Max. Propagation Delay

•Extended 100E VEE Range of ± 4.2V to ± 5.46V

•75kΩ Input Pulldown Resistors

LOGIC DIAGRAM

MC10E150

MC100E150

6-BIT D LATCH

D	D	Q0
0
	R	Q0
D1	D	Q1
	R	Q1
D2	D	Q2
	R	Q2
D3	D	Q3
	R	Q3
D4	D	Q4
	R	Q4
D5	D	Q5
	R	Q5
LEN1
LEN2
MR

PIN NAMES

Pin	Function
D0 ± D5	Data Inputs
LEN1, LEN2	Latch Enables
MR	Master Reset
Q0 ± Q5	True Outputs
Q0 ± Q5	Inverting Outputs

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

Pinout: 28-Lead PLCC (Top View)

				MR	LEN2			LEN1			NC		VCCO			Q5			Q5
			25		24			23			22		21			20		19
D5		26																18				Q4
D4		27																17				Q4
D3		28																16				V
VEE		1																15					CC
																						Q
																						3
D2		2																14				Q
D1		3																13				3
																						Q
																						2
D0		4																12				Q2
			5		6			7			8		9			10		11
				NC	VCCO				Q0		Q0			Q1		Q1		VCCO

* All VCC and VCCO pins are tied together on the die.

12/93

Motorola, Inc. 1996

REV 2

MC10E150 MC100E150

DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

		0°C			25°C		85°C
Symbol	Characteristic	min typ	max	min	typ	max	min typ	max	Unit	Condition
IIH	Input HIGH Current								μA
	D		200			200		200
	LEN, MR		150			150		150
IEE	Power Supply Current								mA
	10E	52	62		52	62	52	62
	100E	52	62		52	62	60	72

AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

			0°C			25°C			85°C
Symbol	Characteristic	min	typ	max	min	typ	max	min	typ	max	Unit	Condition
tPLH	Propagation Delay to Output										ps
tPHL	D	250	375	550	250	375	550	250	375	550
	LEN	375	500	700	375	500	700	375	500	700
	MR	450	625	750	450	625	750	450	625	750
ts	Setup Time										ps
	D	200	50		200	50		200	50
th	Hold Time										ps
	D	200	± 50		200	± 50		200	± 50
tRR	Reset Recovery Time	750	650		750	650		750	650		ps	ps
tPW	Minimum Pulse Width										ps
	MR	400			400			400
tSKEW	Within-Device Skew		50			50			50		ps	1
tr	Rise/Fall Times										ps
tf	20 - 80%	300	450	650	300	450	650	300	450	650

1. Within-device skew is defined as identical transitions on similar paths through a device.

MOTOROLA

2±2