MOTOROLA MC10E160FNR2, MC100E160FNR2, MC10E160FN, MC100E160FN Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

12 Bit Parity

Generator/Checker

The MC10E/100E160 is a 12-bit parity generator/checker. The Q output is HIGH when an odd number of inputs are HIGH. A HIGH on the Enable input (EN) forces the Q output LOW.

The E160 also features an output register. Multiplexers direct the register input, giving the option of holding present data by asserting HOLD LOW, or of shifting data in through the S-IN pin by asserting SHIFT HIGH. The output register itself is clocked by a positive edge on CLK1 or CLK2 (or both). A HIGH on the reset pin (R) overrides to force the Y output LOW.

•Provides Odd-HIGH Parity of 12 Inputs

•Shiftable Output Register with Hold

•900ps Max. D to Q/Q Output

•Enable

•Asynchronous Register Reset

•Dual Clocks

•Extended 100E VEE Range of ± 4.2V to ± 5.46V

•75kΩ Input Pulldown Resistors

Pinout: 28-Lead PLCC (Top View)

D4

D3

D2

D1

D0

EN

VCCO

25

24

23

22

21

20

19

D5

26

18

Q

D6

27

17

Q

D7

28

16

VCC

D0

VEE

15

1

Y

D1

D2

D8

2

14

Y

D3

D4

D

3

13

V

D5

9

CCO

D6

D

4

12

NC

D7

10

D8

5

6

7

8

9

10

11

D9

D10

D11

HOLD

S-IN

SHIFT

CLK1

CLK2

R

D11

* All VCC and VCCO pins are tied together on the die.

EN

PIN NAMES

HOLD

S-IN

Pin

Function

SHIFT

D0 ± D11

Data Inputs

CLK1

S-IN

Serial Data Input

CLK2

EN

Enable, active LOW

R

HOLD

Hold, active LOW

SHIFT

Shift, active HIGH

CLK1, CLK2

Clock Inputs

R

Reset Inputs

Q, Q

Direct Output

Y, Y

Register Output

MC10E160

MC100E160

12-BIT PARITY

GENERATOR/CHECKER

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

LOGIC DIAGRAM

				Q
0	0	D		Y
MUX	MUX			Y
1 SEL	1 SEL		R

12/93

Motorola, Inc. 1996

REV 2

MC10E160 MC100E160

DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

		0°C			25°C		85°C
Symbol	Characteristic	min typ	max	min	typ	max	min typ	max	Unit	Condition
IIH	Input HIGH Current								μA
	CLK1, CLK2		200			200		200
	R		300			300		300
	All Other Inputs		150			150		150
IEE	Power Supply Current								mA
	10E	82	98		82	98	82	98
	100E	82	98		82	98	94	113

AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

						0°C			25°C			85°C
Symbol			Characteristic		min	typ	max	min	typ	max	min	typ	max	Unit	Condition
tPLH	Propagation Delay to Output													ps
tPHL		D to Q			400	650	950	400	650	950	400	650	950
		En to Q			300	550	750	300	550	750	300	550	750
		CLK to Y			275	500	700	275	500	700	275	500	700
		R to Y			275	500	725	275	500	725	275	500	725
ts	Setup Time													ps
		D			1200	900		1200	900		1200	900
		HOLD			600	300		600	300		600	300
		S-IN			350	150		350	150		350	150
		SHIFT			500	250		500	250		500	250
th	Hold Time													ps
		D			± 400	± 900		± 400	± 900		± 400	± 900
		HOLD			100	± 300		100	± 300		100	± 300
		S-IN			300	±150		300	±150		300	±150
		SHIFT			200	± 250		200	± 250		200	± 250
tr	Rise/Fall Time													ps
tf	20 - 80%				300	450	650	300	450	650	300	450	650

1. Within a device skew is guaranteed for identical transitions on similar paths through a device.

MOTOROLA

2±2