MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
2 Input Differential AND/NAND
The MC10EL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E404 the EL05 is ideally suited for those applications which require the ultimate in AC performance.
Because a negative 2-input NAND is equivalent to a 2-input OR function, the differential inputs and outputs of the device allows the EL05 to also be used as a 2-input differential OR/NOR gate.
The differential inputs employ clamp circuitry so that under open input conditions (pulled down to VEE) the input to the AND gate will be HIGH. In this way, if one set of inputs is open, the gate will remain active to the other input.
•275ps Propagation Delay
•High Bandwidth Output Transitions
•75kΩ Internal Input Pulldown Resistors
•>1000V ESD Protection
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
D0 |
1 |
8 |
VCC |
D0 |
2 |
7 |
Q |
D1 |
3 |
6 |
Q |
D1 |
4 |
5 |
VEE |
MC10EL05
MC100EL05
8 
1
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751-05
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PIN DESCRIPTION |
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PIN |
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FUNCTION |
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D0, D1 |
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Data Inputs |
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Q |
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Data Outputs |
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12/93
Motorola, Inc. 1996 |
REV 2 |
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