Motorola MC10178FN, MC10178L, MC10178P Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Binary Counter

The MC10178 is a four±bit counter capable of divide±by±two, divide±by±four, divide±by±eight or a divide±by±sixteen function.

Clock inputs trigger on the positive going edge of the clock pulse. Set and Reset inputs override the clock, allowing asynchronous ªsetº or ªclear.º Individual Set and common Reset inputs are provided, as well as complementary outputs for the first and fourth bits. True outputs are available at all bits.

PD = 370 mW typ/pkg (No Load)

ftoggle= 150 MHz (typ)

tr, tf = 2.7 ns typ (20%±80%)

LOGIC DIAGRAM

S0

Q0

S1

Q1

S2

Q2

S3

Q3

11

15

7

13

6

4

5

2

12

D1

S

Q'

D1

S

Q'

D1

S Q'

D1

S

Q'

Clock 1

C1

Q'

C1

Q'

C1

Q'

C1

Q

10

Clock 2

C2

Q

Q

Q

9

R

Q

R

R

R

Q

Reset

14

3

Q0

VCC1 = PIN 1

Q3

VCC2 = PIN 16

VEE = PIN 8

TRUTH TABLE

INPUTS

OUTPUTS

R

S0

S1

S2

S3

C1

C2

Q0

Q1

Q2

Q3

H

L

L

L

L

X

X

L

L

L

L

L

H

H

H

H

X

X

H

H

H

H

L

L

L

L

L

H

X

No Count

L

L

L

L

L

X

H

No Count

L

L

L

L

L

**

L

L

L

L

L

L

L

L

L

**

H

L

L

L

L

L

L

L

L

**

L

H

L

L

L

L

L

L

L

**

H

H

L

L

L

L

L

L

L

**

L

L

H

L

L

L

L

L

L

**

H

L

H

L

L

L

L

L

L

**

L

H

H

L

L

L

L

L

L

**

H

H

H

L

L

L

L

L

L

**

L

L

L

H

L

L

L

L

L

**

H

L

L

H

L

L

L

L

L

**

L

H

L

H

L

L

L

L

L

**

H

H

L

H

L

L

L

L

L

**

L

L

H

H

L

L

L

L

L

**

H

L

H

H

L

L

L

L

L

**

L

H

H

H

L

L

L

L

L

**

H

H

H

H

**

VIH

Clock transition from VIL to VIH may be applied to C1 or C2 or both for

VIL

same effect.

MC10178

L SUFFIX

CERAMIC PACKAGE

CASE 620±10

P SUFFIX

PLASTIC PACKAGE

CASE 648±08

FN SUFFIX

PLCC

CASE 775±02

DIP

PIN ASSIGNMENT

VCC1				1		16		VCC2
	Q3			2		15		Q0
	Q3			3		14		Q0
	Q2			4		13		Q1
	S3			5		12		CLOCK 1
	S2			6		11		S0
	S1			7		10		CLOCK 2
VEE				8		9		RESET

Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±11 of the Motorola MECL Data Book (DL122/D).

3/93

Motorola, Inc. 1996

3±136

REV 5

MC10178

ELECTRICAL CHARACTERISTICS

							Test Limits
			Pin
				±30°C				+25°C			+85°C
			Under
Characteristic		Symbol	Test	Min	Max	Min		Typ		Max	Min	Max	Unit
Power Supply Drain Current		IE	8		97					88		97	mAdc
Input Current		IinH	12		390					245		245	μAdc
			11		350					220		220
			9		650					410		410
		IinL	*	0.5		0.5					0.3		μAdc
Output Voltage	Logic 1	VOH	14	±1.060	±0.890	±0.960				±0.810	±0.890	±0.700	Vdc
			15	±1.060	±0.890	±0.960				±0.810	±0.890	±0.700
Output Voltage	Logic 0	VOL	14	±1.890	±1.675	±1.850				±1.650	±1.825	±1.615	Vdc
			15	±1.890	±1.675	±1.850				±1.650	±1.825	±1.615
Threshold Voltage	Logic 1	VOHA	3	±1.080		±0.980					±0.910		Vdc
			14	±1.080		±0.980					±0.910
			15	±1.080		±0.980					±0.910
Threshold Voltage	Logic 0	VOLA	3		±1.655					±1.630		±1.595	Vdc
			14		±1.655					±1.630		±1.595
			15		±1.655					±1.630		±1.595
Switching Times	(50Ω Load)												ns
Propagation	Clock Input	t12+15+	15	1.4	5.0	1.5		3.5		4.8	1.5	5.3
Delay		t12±13±	13	1.9	9.4	2.0		6.0		9.2	2.0	9.8
		t12+4±	4	2.9	12.3	3.0		8.5		12.0	3.0	12.8
		t12±3+	3	3.9	14.9	4.0		11.0		14.5	4.0	15.5
Rise Time	(20 to 80%)	t15+	15	1.1	4.7	1.1		2.5		4.5	1.1	5.0
Fall Time	(20 to 80%)	t15±	15	1.1	4.7	1.1		2.5		4.5	1.1	5.0
Set Input		t11±15+	15	1.4	5.2	1.5				5.0	1.5	5.5
Reset Input		t9±15+	15	1.4	5.2	1.5				5.0	1.5	5.5
Counting Frequency		fcount	15	125		125		150			125		MHz

* Individually test each input applying VIL to input under test.

MECL Data	3±137	MOTOROLA
DL122 Ð Rev 6