MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4 Bit Parallel/Serial Converter |
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MC10E446 |
The MC10E/100E446 is an integrated 4-bit parallel to serial data |
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MC100E446 |
converter. The device is designed to operate for NRZ data rates of up to |
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1.3Gb/s. The chip generates a divide by 4 and a divide by 8 clock for both |
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4-bit conversion and a two chip 8-bit conversion function. The conversion |
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sequence was chosen to convert the parallel data into a serial stream |
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from bit D0 to D3. A serial input is provided to cascade two E446 devices |
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for 8 bit conversion applications. Note that the serial output data clocks off |
4-BIT PARALLEL/ |
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of the negative input clock transition. |
SERIAL CONVERTER
•On Chip Clock 4 and 8
•1.5 Gb/s Typical Data Rate Capability
•Differential Clock and Serial Inputs
•VBB Output for Single-ended Input Applications
•Asynchronous Data Synchronization
•Mode Select to Expand to 8 Bits
• Internal 75kΩ Input Pulldown Resistors
• Extended 100E VEE Range of -4.2V to -5.46V
The SYNC input will asynchronously reset the internal clock circuitry. |
FN SUFFIX |
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This pin allows the user to reset the internal clock conversion unit and |
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PLASTIC PACKAGE |
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thus select the start of the conversion process. |
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CASE 776-02 |
The MODE input is used to select the conversion mode of the device. With the MODE input LOW, or open, the device will function as a 4-bit converter. When the mode input is driven HIGH the internal load clock will
change on every eighth clock cycle thus allowing for an 8-bit conversion scheme using two E446's. When cascaded in an 8-bit conversion scheme the devices will not operate at the 1.3Gb/s data rate of a single device. Refer to the applications section of this data sheet for more information on cascading the E446.
For lower data rate applications a VBB reference voltage is supplied for single-ended inputs. When operating at clock rates above 500MHz differential input signals are recommended. For single-ended inputs the VBB pin is tied to the inverting differential input and bypassed via a 0.01μF capacitor. The VBB provides the switching reference for the input differential amplifier. The VBB can also be used to AC couple an input signal, for more information on AC coupling refer to the interfacing section of the design guide in the ECLinPS data book.
PIN NAMES |
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Pinout: 28-Lead PLCC (Top View) |
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D0 |
D1 |
D2 |
D3 |
MODE |
NC |
NC |
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Pin |
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Function |
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24 |
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23 |
22 |
21 |
20 |
19 |
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SIN |
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Differential Serial Data Input |
CLK |
26 |
25 |
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NC |
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D0 ± D3 |
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Parallel Data Inputs |
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18 |
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SOUT, SOUT |
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Differential Serial Data Output |
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CLK |
27 |
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17 |
NC |
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CLK, CLK |
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Differential Clock Inputs |
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CL/4, CL/4 |
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Differential 4 Clock Output |
VBB |
28 |
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16 |
VCC |
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CL/8, CL/8 |
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Differential |
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8 Clock Output |
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MODE |
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Conversion Mode 4-Bit/8-Bit |
VEE |
1 |
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15 |
SOUT |
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SYNC |
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Conversion Synchronizing Input |
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FUNCTION TABLES |
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SIN |
2 |
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14 |
SOUT |
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SIN |
3 |
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13 |
VCCO |
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Mode |
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Conversion |
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L |
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4-Bit |
SYNC |
4 |
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12 |
NC |
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H |
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8-Bit |
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5 |
6 |
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7 |
8 |
9 |
10 |
11 |
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VCCO CL/8 |
CL/8 VCCO CL/4 |
CL/4 VCCO |
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7/96
Motorola, Inc. 1996 |
REV 2 |
MC10E446 MC100E446
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LOGIC DIAGRAM |
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SIN |
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0 |
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SIN |
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D |
Q |
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D3 |
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1 |
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CLK |
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0 |
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D |
Q |
D2 |
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1 |
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CLK |
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0 |
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D |
Q |
D1 |
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1 |
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CLK |
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0 |
SOUT |
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D |
Q |
D0 |
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1 |
SOUT |
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CLK |
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LOAD PULSE |
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GENERATOR |
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Mode |
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0 |
CL/8 |
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1 |
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CLK |
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CL/8 |
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CLK |
Delay |
4 |
8 |
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R |
R |
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CL/4 |
SYNC |
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CL/4 |
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MOTOROLA |
2±2 |