Motorola MC10E151FN, MC100E151FN, MC100E151FNR2, MC10E151FNR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

6 Bit D Register

The MC10E/100E151 contains 6 D-type, edge-triggered, master-slave flip-flops with differential outputs. Data enters the master when both CLK1 and CLK2 are LOW, and is transferred to the slave when CLK1 or CLK2 (or both) go HIGH. The asynchronous Master Reset (MR) makes all Q outputs go LOW.

•1100MHz Min. Toggle Frequency

•Differential Outputs

•Asynchronous Master Reset

•Dual Clocks

•Extended 100E VEE Range of ± 4.2V to ± 5.46V

•75kΩ Input Pulldown Resistors

LOGIC DIAGRAM

D0	D
	R
D1	D
	R
D2	D
	R
D3	D
	R
D4	D
	R
D5	D
	R
CLK1
CLK2
MR

Q0

Q0

Q1

Q1

Q2

Q2

Q3

Q3

Q4

			D5
	Q4
			D4
	Q5		D
			3

Q5	VEE
	D2
	D1

PIN NAMES		D0
Pin	Function
D0 ± D5	Data Inputs
CLK1, CLK2	Clock Inputs
MR	Master Reset
Q0 ± Q5	True Outputs
Q0 ± Q5	Inverted Outputs

MC10E151

MC100E151

6-BIT D REGISTER

FN SUFFIX

PLASTIC PACKAGE

CASE 776-02

Pinout: 28-Lead PLCC (Top View)

			MR		CLK2			CLK1			NC		VCCO			Q5			Q5
		25			24			23			22		21			20		19
	26																	18					Q4
	27																	17					Q4
	28																	16					VCC
																		15
	1																						Q3
	2																	14					Q3
	3																	13
																							Q2
	4																	12					Q2
		5			6			7			8		9			10		11
			NC		VCCO				Q0		Q0			Q1		Q1		VCCO

* All VCC and VCCO pins are tied together on the die.

12/93

Motorola, Inc. 1996

REV 2

MC10E151 MC100E151

DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

		0°C			25°C			85°C
Symbol	Characteristic	min typ	max	min	typ	max	min	typ	max	Unit	Condition
IIH	Input HIGH Current		150			150			150	μA
IEE	Power Supply Current									mA
	10E	65	78		65	78		65	78
	100E	65	78		65	78		75	90

AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)

			0°C			25°C			85°C
Symbol	Characteristic	min	typ	max	min	typ	max	min	typ	max	Unit	Condition
fMAX	Max. Toggle Frequency	1100	1400		1100	1400		1100	1400		MH
											z
tPLH	Propagation Delay to Output										ps
tPHL	Clk	475	650	800	475	650	800	475	650	800
	MR	475	650	850	475	650	850	475	650	850
ts	Setup TIme										ps
	D	0	±175		0	±175		0	±175
th	Hold Time										ps
	D	350	175		350	175		350	175
tRR	Reset Recovery Time	750	550		750	550		750	550			ps
tPW	Minimum Pulse Width										ps
	CLK, MR	400			400			400
tSKEW	Within-Device Skew		65			65			65		ps	1
tr	Rise/Fall Times										ps
tf	20 - 80%	300	450	700	300	450	700	300	450	700

1. Within-device skew is defined as identical transitions on similar paths through a device.

MOTOROLA

2±2