Motorola MC100LVEL30DWR2, MC100LVEL30, MC100LVEL30DW, MC100EL30DW, MC100EL30DWR2 Datasheet

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

	Triple D Flip-Flop	MC100LVEL30
	With Set and Reset
		MC100EL30

The MC100LVEL30 is a triple master±slave D flip flop with differential outputs. The MC100EL30 is pin and functionally equivalent to the MC100LVEL30 but is specified for operation at the standard 100E ECL voltage supply. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the clock input.

In addition to a common Set input individual Reset inputs are provided for each flip flop. Both the Set and Reset inputs function asynchronous and overriding with respect to the clock inputs.

•1200MHz Minimum Toggle Frequency

•20±Lead SOIC Packaging

•550ps Typical Propagation Delays

•Set and Reset Inputs

•Supports both Standard and Low Voltage 100K ECL

•Internal Input Pulldown Resistors

•>2000V ESD Protection

Logic Diagram and Pinout: 20-Lead SOIC (Top View)

	VCC				Q0			Q0				VCC			Q1			Q1				VCC			Q2			Q2				VEE
	20				19			18				17			16			15				14			13			12				11

	Q	Q		Q	Q		Q	Q
	S	R	S		R		S	R
	D			D			D
1	2	3	4	5	6	7	8	9	10
S012	D0	CLK0	R0	D1	CLK1	R1	D2	CLK2	R2

20

1

DW SUFFIX

PLASTIC SOIC PACKAGE

CASE 751D±04

TRUTH TABLE

		S		D		CLK		Q
R										Q
L		L		L		Z		L		H
L		L		H		Z		H		L
H		L		X		X		L		H
L		H		X		X		H		L
H		H		X		X		Undef	Undef
Z = LOW to HIGH Transition
PIN NAMES
Pins					Function
D0±D2					Data Inputs
R0±R2					Reset Inputs
CLK0±CLK2					Clock Inputs
S012					Common Set Input

5/96

Motorola, Inc. 1996

REV 2