MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad OR/NOR Gate
The MC10101 is a quad 2±input OR/NOR gate with one input from each gate common to pin 12.
PD = 25 mW typ/gate (No Load) tpd = 2.0 ns typ
tr, tf = 2.0 ns typ (20%±80%)
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LOGIC DIAGRAM |
4 |
2 |
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5 |
7 |
3 |
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6 |
10 |
14 |
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11 |
13 |
15 |
12 |
9 |
VCC1 |
= PIN 1 |
VCC2 |
= PIN 16 |
VEE |
= PIN 8 |
MC10101
L SUFFIX
CERAMIC PACKAGE
CASE 620±10
P SUFFIX
PLASTIC PACKAGE
CASE 648±08
FN SUFFIX
PLCC
CASE 775±02
DIP
PIN ASSIGNMENT
VCC1 |
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1 |
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16 |
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VCC2 |
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AOUT |
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2 |
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15 |
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DOUT |
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BOUT |
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3 |
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14 |
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COUT |
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AIN |
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4 |
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13 |
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DIN |
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AOUT |
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5 |
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12 |
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COMMON |
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INPUT |
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BOUT |
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6 |
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11 |
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COUT |
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BIN |
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7 |
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10 |
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CIN |
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VEE |
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8 |
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9 |
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DOUT |
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Pin assignment is for Dual±in±Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6±36 of the Motorola MECL Data Book (DL122/D).
3/93
Motorola, Inc. 1996 |
3±1 |
REV 5 |
MC10101
ELECTRICAL CHARACTERISTICS
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Test Limits |
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Pin |
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±30°C |
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+25°C |
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+85°C |
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Under |
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Characteristic |
Symbol |
Test |
Min |
Max |
Min |
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Typ |
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Max |
Min |
Max |
Unit |
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Power Supply Drain Current |
IE |
8 |
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29 |
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20 |
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26 |
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29 |
mAdc |
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Input Current |
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IinH |
4 |
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425 |
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265 |
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265 |
μAdc |
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12 |
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850 |
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535 |
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535 |
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IinL |
4 |
0.5 |
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0.5 |
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0.3 |
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μAdc |
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12 |
0.5 |
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0.5 |
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0.3 |
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Output Voltage |
Logic 1 |
VOH |
5 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
Vdc |
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5 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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2 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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2 |
±1.060 |
±0.890 |
±0.960 |
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±0.810 |
±0.890 |
±0.700 |
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Output Voltage |
Logic 0 |
VOL |
5 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
Vdc |
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5 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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2 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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2 |
±1.890 |
±1.675 |
±1.850 |
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±1.650 |
±1.825 |
±1.615 |
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Threshold Voltage |
Logic 1 |
VOHA |
5 |
±1.080 |
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±0.980 |
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±0.910 |
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Vdc |
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5 |
±1.080 |
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±0.980 |
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±0.910 |
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2 |
±1.080 |
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±0.980 |
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±0.910 |
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2 |
±1.080 |
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±0.980 |
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±0.910 |
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Threshold Voltage |
Logic 0 |
VOLA |
5 |
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±1.655 |
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±1.630 |
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±1.595 |
Vdc |
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5 |
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±1.655 |
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±1.630 |
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±1.595 |
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2 |
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±1.655 |
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±1.630 |
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±1.595 |
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2 |
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±1.655 |
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±1.630 |
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±1.595 |
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Switching Times |
(50Ω Load) |
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ns |
Propagation Delay |
t4+2± |
2 |
1.0 |
3.1 |
1.0 |
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2.0 |
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2.9 |
1.0 |
3.3 |
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t4±2+ |
2 |
1.0 |
3.1 |
1.0 |
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2.0 |
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2.9 |
1.0 |
3.3 |
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t4+5+ |
5 |
1.0 |
3.1 |
1.0 |
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2.0 |
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2.9 |
1.0 |
3.3 |
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t4±5± |
5 |
1.0 |
3.1 |
1.0 |
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2.0 |
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2.9 |
1.0 |
3.3 |
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Rise Time |
(20 to 80%) |
t2+ |
2 |
1.1 |
3.6 |
1.1 |
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2.0 |
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3.3 |
1.1 |
3.7 |
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t5+ |
5 |
1.1 |
3.6 |
1.1 |
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2.0 |
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3.3 |
1.1 |
3.7 |
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Fall Time |
(20 to 80%) |
t2± |
2 |
1.1 |
3.6 |
1.1 |
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2.0 |
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3.3 |
1.1 |
3.7 |
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t5± |
5 |
1.1 |
3.6 |
1.1 |
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2.0 |
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3.3 |
1.1 |
3.7 |
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MOTOROLA |
3±2 |
MECL Data |
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DL122 Ð Rev 6 |
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