MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
TTL to Differential ECL |
MC10ELT24 |
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Translator |
MC100ELT24 |
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The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5V, -5.2V (or -4.5V) and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT24 makes it ideal for those applications where space, performance and low power are at a premium. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features.
The ELT24 is available in both ECL standards: the 10ELT is compatible with MECL 10H logic levels while the 100ELT is compatible with ECL 100K logic levels.
•1.2ns Typical Propagation Delay
•Differential PECL Outputs
•Small Outline SOIC Package
•PNP TTL Inputs for Minimal Loading
•Flow Through Pinouts
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
VEE |
1 |
8 |
VCC |
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TTL |
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D |
2 |
7 |
Q |
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ECL |
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NC |
3 |
6 |
Q |
NC |
4 |
5 |
GND |
8 
1
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751-05
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PIN DESCRIPTION |
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PIN |
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FUNCTION |
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Q |
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Diff ECL Outputs |
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D |
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TTL Input |
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VCC |
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Positive Supply |
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VEE |
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Negative Supply |
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GND |
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Ground |
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1/95
Motorola, Inc. 1996 |
REV 2 |
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