Texas Instruments TPS2102D, TPS2103DR, TPS2103DBVT, TPS2103DBVR, TPS2103D Datasheet

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TPS2102, TPS2103

VAUX POWER-DISTRIBUTION SWITCHES

SLVS234A ± SEPTEMBER 1999 ± REVISED APRIL 2000

features

DDual-Input, Single-Output MOSFET Switch With No Reverse Current Flow (No Parasitic Diodes)

DIN1 . . . 250-mΩ, 500-mA N-Channel; 14-µA Supply Current

DIN2 . . . 1.3-Ω, 100-mA P-Channel; 0.75-µA Supply Current (VAUX Mode)

DAdvanced Switch Control Logic

DCMOS and TTL Compatible Enable Input

DControlled Rise, Fall, and Transition Times

D2.7 V to 4 V Operating Range

DSOT-23-5 and SOIC-8 Package

D±40°C to 70°C Ambient Temperature Range

D2-kV Human Body Model, 750-V Charged Device Model, 200-V Machine-Model ESD Protection

typical applications

DNotebook and Desktop PCs

DCell phone, Palmtops, and PDAs

DBattery Management

3.3V VCC

3.3V VAUX

D3 or PME Status Control Signal

TPS2102

Controller

IN1

3.3 V

(CardBus,

IN2

1394,

 

PCI,

EN

et al.)

 

Holdup

 

Capacitor

 

Figure 1. Typical Dual-Input Single-Output

Application

description

The TPS2102 and TPS2103 are dual-input, single-output power switches designed to provide uninterrupted output voltage when transitioning between two independent power supplies. Both devices combine one n-channel (250 mΩ) and one p-channel (1.3 Ω) MOSFET with a single output. The p-channel MOSFET (IN2) is used with auxiliary power supplies that deliver lower current for standby modes. The n-channel MOSFET (IN1) is used with a main power supply that delivers higher current required for normal operation. Low on-resistance makes the n-channel the ideal path for higher main supply current when power-supply regulation and system voltage drops are critical. When using the p-channel MOSFET, quiescent current is reduced to 0.75 µA to decrease the demand on the standby power supply. The MOSFETs in the TPS2102 and TPS2103 do not have the parasitic diodes, typically found in discrete MOSFETs, thereby preventing back-flow current when the switch is off.

 

TPS2102

DBV PACKAGE

D PACKAGE

(TOP VIEW)

(TOP VIEW)

 

PCI Bus

VAUX

3.3 V

VGA

 

TPS210x

 

VCC

D3-STAT

 

 

PCI12xx / PCI14xx

 

CardBus Controller

 

Figure 2. VAUX CardBus Implementation

 

 

 

 

 

 

 

 

 

IN1

IN2

 

 

1

8

 

 

OUT

 

EN

 

 

 

1

5

 

 

 

 

 

 

 

 

 

 

GND

 

 

2

7

 

 

OUT

GND

 

 

2

 

 

 

 

 

 

 

 

IN2

 

 

3

4

 

 

OUT

 

EN

 

 

 

 

3

6

 

 

NC

 

 

 

 

 

 

 

 

 

 

 

 

NC

 

 

4

5

 

 

IN1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TPS2103

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DBV PACKAGE

 

 

 

 

 

 

D PACKAGE

 

 

 

 

 

(TOP VIEW)

 

 

 

 

 

 

 

(TOP VIEW)

 

 

 

 

 

 

 

 

 

 

 

IN2

 

 

 

 

 

 

 

OUT

EN

 

 

1

5

 

 

IN1

 

 

 

1

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

2

7

 

 

OUT

GND

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EN

 

 

 

3

6

 

 

NC

IN2

 

 

3

4

 

 

OUT

 

 

 

 

 

 

 

 

 

NC

 

 

 

4

5

 

 

IN1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC ± No internal connection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 2000, Texas Instruments Incorporated

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

1

TPS2102, TPS2103

VAUX POWER-DISTRIBUTION SWITCHES

SLVS234A ± SEPTEMBER 1999 ± REVISED APRIL 2000

Selection Guide, VAUX Power-Distribution Switches

 

 

 

 

 

 

OPERATING

MAXIMUM INPUT

MAXIMUM INPUT

AMBIENT

DEVICE

ENABLE

VOLTAGE RANGE

CURRENT, IN1

CURRENT, IN2

TEMPERATURE RANGE

 

 

 

 

 

 

(V)

(mA)

(mA)

(°C)

 

 

 

 

 

 

 

 

TPS2100

 

 

 

 

 

2.7 to 4

500

10

± 40 to 70

 

 

EN

 

 

 

 

 

 

 

 

 

 

TPS2101

 

EN

2.7 to 4

500

10

± 40 to 70

 

 

 

 

 

 

 

TPS2102

 

 

 

 

 

2.7 to 4

500

100

± 40 to 70

 

EN

 

 

 

 

 

 

 

 

TPS2103

 

EN

2.7 to 4

500

100

± 40 to 70

 

 

 

 

 

 

 

TPS2104

 

 

 

 

 

2.7 to 5.5

500

100

± 40 to 85

 

EN

 

 

 

 

 

 

 

 

TPS2105

 

EN

2.7 to 5.5

500

100

± 40 to 85

AVAILABLE OPTIONS FOR TPS2102, TPS2103

 

 

 

 

 

PACKAGED DEVICES

TA

DEVICE

ENABLE

 

 

SOT-23-5

SOIC-8

 

 

 

 

 

(DBV)²

(D)

 

TPS2102

 

TSP2102DBV²

TPS2102D

±40°C to 70°C

 

EN

 

TPS2103

EN

TPS2103DBV²

TPS2103D

 

Both packages are available left-end taped and reeled. Add an R suffix to the D device type (e.g., TPS2103DR).

²Add T (e.g., TPS2102DBVT) to indicate tape and reel at order quantity of 250 parts. Add R (e.g., TPS2102DBVR) to indicate tape and reel at order quantity of 3000 parts.

Function Tables

TPS2102

 

 

 

 

 

 

VIN1

VIN2

 

EN

 

OUT

0 V

0 V

 

XX

 

GND

 

 

 

 

 

 

0 V

3.3 V

 

L

 

GND

 

 

 

 

 

 

3.3 V

0 V

 

L

 

VIN1

 

 

 

 

 

 

3.3 V

3.3 V

 

L

 

VIN1

 

 

 

 

 

 

0 V

3.3 V

 

H

 

VIN2

 

 

 

 

 

 

3.3 V

0 V

 

H

 

VIN2

 

 

 

 

 

 

3.3 V

3.3 V

 

H

 

VIN2

 

 

 

 

 

 

XX = don't care

TPS2103

VIN1

VIN2

EN

OUT

 

 

 

 

0 V

0 V

XX

GND

 

 

 

 

0 V

3.3 V

H

GND

 

 

 

 

3.3 V

0 V

H

VIN1

 

 

 

 

3.3 V

3.3 V

H

VIN1

 

 

 

 

0 V

3.3 V

L

VIN2

 

 

 

 

3.3 V

0 V

L

VIN2

 

 

 

 

3.3 V

3.3 V

L

VIN2

 

 

 

 

2

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Texas Instruments TPS2102D, TPS2103DR, TPS2103DBVT, TPS2103DBVR, TPS2103D Datasheet

TPS2102, TPS2103

VAUX POWER-DISTRIBUTION SWITCHES

SLVS234A ± SEPTEMBER 1999 ± REVISED APRIL 2000

TPS2102 functional block diagram

 

 

SW1

IN1

 

250 mΩ

 

OUT

Pullup

 

Charge

 

Pump

Circuit

 

 

Discharge

 

VCC

Circuit

EN

Driver

Select

 

 

IN2 SW2

1.3 Ω

GND

Driver

TPS2103 functional block diagram

 

 

SW1

IN1

 

250 mΩ

 

OUT

 

 

Charge

 

 

Pump

 

 

Discharge

EN

VCC

Circuit

Select

Driver

 

 

IN2

SW2

1.3 Ω

Pulldown

GND

Circuit

Driver

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3

TPS2102, TPS2103

VAUX POWER-DISTRIBUTION SWITCHES

SLVS234A ± SEPTEMBER 1999 ± REVISED APRIL 2000

 

 

 

 

 

 

 

 

 

Terminal Functions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TERMINAL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NO.

 

 

DESCRIPTION

NAME

 

 

 

 

 

 

I/O

TPS2102

 

TPS2103

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DBV

 

D

 

DBV

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EN

 

 

 

 

1

3

I

Active-high enable for IN1-OUT switch

 

 

 

 

 

 

 

 

 

 

 

EN

 

1

 

3

 

 

 

I

Active-low enable for IN1-OUT switch

 

 

 

 

 

 

 

 

 

GND

2

 

2

 

2

2

I

Ground

 

 

 

 

 

 

 

 

 

IN1²

5

 

5

 

5

5

I

Main Input voltage, NMOS drain (250 mΩ), require 0.22 µF bypass

IN2²

3

 

1

 

3

1

I

Auxilliary input voltage, PMOS drain (1.3 Ω), require 0.22 µF bypass

OUT

4

 

7, 8

 

4

7, 8

O

Power switch output

 

 

 

 

 

 

 

 

 

NC

 

 

4, 6

 

 

4, 6

 

No connection

² Unused INx should not be grounded.

detailed description

power switches n-channel MOSFET

The IN1-OUT n-channel MOSFET power switch has a typical on-resistance of 250 mΩ at 3.3-V input voltage, and is configured as a high-side switch.

p-channel MOSFET

The IN2-OUT p-channel MOSFET power switch has a typical on-resistance of 1.3 Ω at 3.3-V input voltage and is configured as a high-side switch. When operating, the p-channel MOSFET quiescent current is reduced to typically 0.75 µA.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires very little supply current.

driver

The driver controls the gate voltage of the IN1-OUT and IN2-OUT power switches. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the drivers incorporate circuitry that controls the rise times and fall times of the output voltage.

enable

The logic enable will turn on the IN2-OUT power switch when a logic high is present on EN (TPS2102) or logic low is present on EN (TPS2103). A logic low input on EN (TPS2102) or logic high on EN (TPS2103) restores bias to the drive and control circuits and turns on the IN1-OUT power switch. The enable input is compatible with both TTL and CMOS logic levels.

the VAUX application for CardBus controllers

The PC Card specification requires the support of VAUX to the CardBus controller as well as to the PC Card sockets. Both are 3.3-V requirements; however the CardBus controller's current demand from the VAUX supply is limited to 10 µA, whereas the PC Card may consume as much as 200 mA. In either implementation, if support of a wake-up event is required, the controller and the socket will transition from the 3.3-V VCC rail to the 3.3-V VAUX rail when the equipment moves into a low power mode such as D3. The transition from VCC to VAUX needs to be seamless in order to maintain all memory and register information in the system. If VAUX is not supported, the system will lose all register information when it transitions to the D3 state.

4

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TPS2102, TPS2103

VAUX POWER-DISTRIBUTION SWITCHES

SLVS234A ± SEPTEMBER 1999 ± REVISED APRIL 2000

absolute maximum ratings over operating free-air temperature (unless otherwise noted)²

Input voltage range, VI(IN1) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . ±0.3 V to 5 V

Input voltage range, VI(IN2) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ±0.3 V to 5 V

Input voltage range, VI at EN or EN (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ±0.3 V to 5 V

Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . ±0.3 V to 5 V

Continuous output current, IO(IN1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . 700 mA

Continuous output current, IO(IN2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . 140 mA

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

See dissipation rating table

Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . ±40°C to 85°C

Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . ±65°C to 150°C

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . .

. . . . . . . . . . . . . . . . . 260°C

Electrostatic discharge (ESD) protection: Human body model . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . 2 kV

Machine model . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . 200 V

Charged device model . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . 750 V

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to GND.

 

 

DISSIPATION RATING TABLE

 

PACKAGE

TA < 25°C

 

DERATING FACTOR

TA = 70°C

TA = 85°C

POWER RATING

 

ABOVE TA = 25°C

POWER RATING

POWER RATING

 

 

DBV

309 mW

 

3.1 mW/°C

170 mW

123 mW

 

 

 

 

 

 

D

568 mW

 

5.7 mW/°C

313 mW

227 mW

recommended operating conditions

 

 

 

MIN

MAX

UNIT

 

 

 

 

 

 

Input voltage, VI(INx)

2.7

4

V

Input voltage, VI at

 

and EN

0

4

V

EN

Continuous output current, IO(IN1)

 

500

mA

Continuous output current, IO(IN2)

 

100³

mA

Operating virtual junction temperature, TJ

± 40

85

°C

³The device can deliver up to 220 mA at IO(IN2). However, operation at the higher current levels will result in greater voltage drop across the device, and greater voltage droop when switching between IN1 and IN2.

electrical characteristics over recommended operating junction temperature range, VI(IN1) = V(IN2) = 3.3 V, IO = rated current (unless otherwise noted)

power switch

 

PARAMETER

 

TEST

MIN TYP

MAX

UNIT

 

 

CONDITIONS²

 

 

 

 

 

 

 

 

IN1-OUT

TJ = 25°C

250

 

rDS(on)

On-state resistance

TJ = 85°C

300

375

 

 

IN2-OUT

TJ = 25°C

1.3

 

Ω

 

 

 

 

 

TJ = 85°C

1.5

2.1

 

 

 

 

² Pulse-testing techniques maintain junction temperature close to ambient termperature; thermal effects must be taken into account separately.

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5

TPS2102, TPS2103

VAUX POWER-DISTRIBUTION SWITCHES

SLVS234A ± SEPTEMBER 1999 ± REVISED APRIL 2000

electrical characteristics over recommended operating junction temperature range, VI(IN1) = V(IN2) = 3.3 V, IO = rated current (unless otherwise noted) (continued)

enable input (EN and EN)

 

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

UNIT

 

 

 

 

 

 

 

 

 

 

 

VIH

High-level input voltage

2.7 V VI(INx) 4 V

2

 

V

VIL

Low-level input voltage

2.7 V VI(INx) 4 V

 

0.8

V

II

Input current

TPS2102

 

EN

= 0 V or

EN

= VI(INx)

±0.5

0.5

A

TPS2103

EN = 0 V or EN = VI(INx)

±0.5

0.5

A

 

 

supply current

 

PARAMETER

 

 

 

TEST CONDITIONS

 

 

 

MIN

TYP MAX

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

= H,

TJ = 25°C

 

 

 

0.75

 

 

 

 

 

 

EN

 

 

 

 

A

 

 

TPS2102

 

IN2 selected

±40°C TJ

85°C

 

 

1.5

 

 

 

 

 

 

 

 

 

 

= L,

TJ = 25°C

 

 

 

14

 

 

 

 

 

 

EN

 

 

 

 

A

II

Supply current

 

 

IN1 selected

±40°C TJ

85°C

 

 

24

 

 

 

 

 

 

 

EN = L,

TJ = 25°C

 

 

 

0.75

 

A

 

 

 

 

 

 

 

 

 

 

 

 

IN2 selected

° ≤

TJ

°

 

 

1.5

 

 

 

 

 

 

 

 

 

TPS2103

 

 

 

±40 C

 

85 C

 

 

 

 

 

 

EN = H,

TJ = 25°C

 

 

 

14

 

A

 

 

 

 

 

 

 

 

 

 

 

 

IN1 selected

° ≤

TJ

°

 

 

24

 

 

 

 

 

 

 

 

 

 

 

 

 

±40 C

 

85 C

 

 

 

switching characteristics, T

= 25°C, V

I(IN1)

= V

I(IN2)

= 3.3 V (unless otherwise noted)²

 

 

J

 

 

 

 

 

 

 

 

PARAMETER

 

 

 

 

 

TEST CONDITIONS²

MIN TYP MAX

UNIT

 

 

 

 

 

 

 

 

CL = 1 F,

IL = 500 mA

440

 

 

 

 

IN1-OUT

 

VI(IN2) = 0

CL = 10 F,

IL = 500 mA

440

 

tr

Output rise time

 

 

 

 

 

 

CL = 1 F,

IL = 100 mA

370

s

 

 

 

 

 

 

CL = 1 F,

IL = 100 mA

4.6

 

 

 

 

 

 

 

 

 

 

 

 

IN2-OUT

 

VI(IN1) = 0

CL = 10 F,

IL = 100 mA

50

 

 

 

 

 

 

 

 

 

CL = 1 F,

IL = 10 mA

4.6

 

 

 

 

 

 

 

 

 

CL = 1 F,

IL = 500 mA

5

 

 

 

 

IN1-OUT

 

VI(IN2) = 0

CL = 10 F,

IL = 500 mA

100

 

tf

Output fall time

 

 

 

 

 

 

CL = 1 F,

IL = 100 mA

13

s

 

 

 

 

 

 

CL = 1 F,

IL = 100 mA

68

 

 

 

 

 

 

 

 

 

 

 

 

IN2-OUT

 

VI(IN1) = 0

CL = 10 F,

IL = 100 mA

680

 

 

 

 

 

 

 

 

 

CL = 1 F,

IL = 10 mA

720

 

tPLH

Propagation delay time, low-to-high output

IN1-OUT

 

VI(IN2) = 0

CL = 10 F,

IL = 100 mA

80

s

IN2-OUT

 

VI(IN1) = 0

2

 

 

 

 

 

 

 

tPHL

Propagation delay time, high-to-low output

IN1-OUT

 

VI(IN2) = 0

CL = 10 F,

IL = 100 mA

3

s

IN2-OUT

 

VI(IN1) = 0

40

 

 

 

 

 

 

 

² All timing parameters refer to Figure 3.

6

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